FR3119929B1 - Procede de fabrication d’une structure adaptee pour les applications radiofrequences, et substrat support pour ladite structure - Google Patents

Procede de fabrication d’une structure adaptee pour les applications radiofrequences, et substrat support pour ladite structure Download PDF

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Publication number
FR3119929B1
FR3119929B1 FR2101411A FR2101411A FR3119929B1 FR 3119929 B1 FR3119929 B1 FR 3119929B1 FR 2101411 A FR2101411 A FR 2101411A FR 2101411 A FR2101411 A FR 2101411A FR 3119929 B1 FR3119929 B1 FR 3119929B1
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France
Prior art keywords
support substrate
ohm
temperature
interstitial oxygen
defects
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FR2101411A
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English (en)
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FR3119929A1 (fr
Inventor
Romain Bouveyron
Isabelle Bertrand
Maël Coche
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Soitec SA
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Soitec SA
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Priority to FR2101411A priority Critical patent/FR3119929B1/fr
Publication of FR3119929A1 publication Critical patent/FR3119929A1/fr
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Publication of FR3119929B1 publication Critical patent/FR3119929B1/fr
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3226Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering of silicon on insulator
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

L’invention concerne un procédé de fabrication d’une structure adaptée pour des applications radiofréquences, comprenant les étapes suivantes : a) la fourniture d’un substrat initial en silicium monocristallin, présentant une teneur en oxygène interstitiel comprise entre 6.50x1017 Oi/cm3 et 11.52x1017 Oi/cm3, et une résistivité comprise entre 200 ohm.cm et 1500 ohm.cm, le substrat initial étant destiné à former un substrat support après avoir subi successivement les étapes b) et c) subséquentes, b) l’application d’un premier traitement thermique comprenant un plateau à une température comprise entre 1100°C et 1300°C, et une rampe de descente en température supérieure ou égale à 40°C/s, sous atmosphère neutre, pour injecter des défauts de type lacunes dans le substrat initial destinés à former des centres de nucléation favorables à une précipitation de l’oxygène interstitiel, c) l’application d’un deuxième traitement thermique comprenant une première séquence de recuit à une température comprise entre 600°C et 900°C, et une deuxième séquence de recuit à une température comprise entre 950°C et 1100°C, pour générer la précipitation de l’oxygène interstitiel sous forme de micro-défauts et former le substrat support pour la structure. L’invention concerne également un substrat support en silicium monocristallin, présentant une teneur en oxygène interstitiel (Oi) inférieure ou égale à 8,5x1017 Oi/cm3, une résistivité comprise entre 200 ohm.cm et 1500 ohm.cm, et une concentration en micro-défauts (BMD) comprise entre 1x109/cm3 et 3x1010/cm3. Pas de Figure
FR2101411A 2021-02-15 2021-02-15 Procede de fabrication d’une structure adaptee pour les applications radiofrequences, et substrat support pour ladite structure Active FR3119929B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR2101411A FR3119929B1 (fr) 2021-02-15 2021-02-15 Procede de fabrication d’une structure adaptee pour les applications radiofrequences, et substrat support pour ladite structure

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2101411 2021-02-15
FR2101411A FR3119929B1 (fr) 2021-02-15 2021-02-15 Procede de fabrication d’une structure adaptee pour les applications radiofrequences, et substrat support pour ladite structure

Publications (2)

Publication Number Publication Date
FR3119929A1 FR3119929A1 (fr) 2022-08-19
FR3119929B1 true FR3119929B1 (fr) 2023-11-03

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FR2101411A Active FR3119929B1 (fr) 2021-02-15 2021-02-15 Procede de fabrication d’une structure adaptee pour les applications radiofrequences, et substrat support pour ladite structure

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Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1087041B1 (fr) * 1999-03-16 2009-01-07 Shin-Etsu Handotai Co., Ltd Procede de production d'une tranche de silicium et tranche de silicium ainsi obtenue
JP2002009081A (ja) * 2000-06-26 2002-01-11 Toshiba Corp 半導体装置及びその製造方法
FR2838865B1 (fr) * 2002-04-23 2005-10-14 Soitec Silicon On Insulator Procede de fabrication d'un substrat avec couche utile sur support de resistivite elevee
FR3051968B1 (fr) * 2016-05-25 2018-06-01 Soitec Procede de fabrication d'un substrat semi-conducteur a haute resistivite

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