FR3076127B1 - Pvt detection circuit - Google Patents
Pvt detection circuit Download PDFInfo
- Publication number
- FR3076127B1 FR3076127B1 FR1763173A FR1763173A FR3076127B1 FR 3076127 B1 FR3076127 B1 FR 3076127B1 FR 1763173 A FR1763173 A FR 1763173A FR 1763173 A FR1763173 A FR 1763173A FR 3076127 B1 FR3076127 B1 FR 3076127B1
- Authority
- FR
- France
- Prior art keywords
- transistors
- circuit detection
- pvt
- coupled
- pvt circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
- G01R19/16533—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application
- G01R19/16538—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application in AC or DC supplies
- G01R19/16552—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application in AC or DC supplies in I.C. power supplies
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Logic Circuits (AREA)
- Dram (AREA)
- Measurement Of Current Or Voltage (AREA)
- Manipulation Of Pulses (AREA)
Abstract
L'invention concerne un circuit de détection PVT, comprenant : des premier et deuxième transistors (102, 104) d'un premier type de conductivité, chacun ayant son nœud de commande couplé à une ligne de commande (EN), les premier et deuxième transistors étant agencés de telle sorte que les variations de leurs tensions de seuil en fonction de la température et/ou du procédé de fabrication sont différentes entre elles ; et un amplificateur (106) couplé à un deuxième nœud de conduction principal de chacun des premier et deuxième transistors et agencé pour amplifier une différence entre les courant (I1, I2) conduits par les premier et deuxième transistors afin de générer un signal de sortie (OUT).
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1763173A FR3076127B1 (fr) | 2017-12-22 | 2017-12-22 | Pvt detection circuit |
EP18209928.3A EP3503402A1 (fr) | 2017-12-22 | 2018-12-03 | Circuit de détection pvt |
US16/219,552 US10685700B2 (en) | 2017-12-22 | 2018-12-13 | PVT detection circuit |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1763173A FR3076127B1 (fr) | 2017-12-22 | 2017-12-22 | Pvt detection circuit |
FR1763173 | 2017-12-22 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3076127A1 FR3076127A1 (fr) | 2019-06-28 |
FR3076127B1 true FR3076127B1 (fr) | 2020-01-03 |
Family
ID=61802144
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1763173A Expired - Fee Related FR3076127B1 (fr) | 2017-12-22 | 2017-12-22 | Pvt detection circuit |
Country Status (3)
Country | Link |
---|---|
US (1) | US10685700B2 (fr) |
EP (1) | EP3503402A1 (fr) |
FR (1) | FR3076127B1 (fr) |
Family Cites Families (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4482824A (en) * | 1982-07-12 | 1984-11-13 | Rockwell International Corporation | Tracking ROM drive and sense circuit |
WO1998036497A1 (fr) * | 1997-02-18 | 1998-08-20 | Rambus, Inc. | Circuit d'attaque de bus equipe d'un circuit temoin de vitesse de balayage pourvu d'une serie d'elements retard |
US5892389A (en) * | 1997-06-03 | 1999-04-06 | Motorola, Inc. | Method and circuit for current limiting of DC-DC regulators |
GB9716838D0 (en) * | 1997-08-08 | 1997-10-15 | Philips Electronics Nv | Temperature sensing circuits |
US6265857B1 (en) * | 1998-12-22 | 2001-07-24 | International Business Machines Corporation | Constant current source circuit with variable temperature compensation |
DE10204487B4 (de) * | 2002-01-30 | 2004-03-04 | Infineon Technologies Ag | Temperatursensor |
JP4748449B2 (ja) * | 2003-11-27 | 2011-08-17 | 味の素株式会社 | フェニルアラニン誘導体の結晶及びその製造方法 |
TW200816591A (en) * | 2006-09-28 | 2008-04-01 | Beyond Innovation Tech Co Ltd | Thermal shutdown circuit and method |
US7948819B2 (en) | 2006-11-21 | 2011-05-24 | Agere Systems Inc. | Integrated circuit having a memory with process-voltage-temperature control |
US7812661B2 (en) * | 2007-09-24 | 2010-10-12 | Mediatek Inc. | Electronic system capable of compensating process, voltage and temperature effects |
TWI398875B (zh) * | 2008-03-17 | 2013-06-11 | Elpida Memory Inc | 具有單端感測放大器之半導體裝置 |
WO2010079503A2 (fr) * | 2008-05-08 | 2010-07-15 | Kpit Cummins Infosystems Ltd. | Procédé et système de compensation en boucle ouverte de variations de retard dans une ligne à retard |
KR101183506B1 (ko) * | 2008-11-26 | 2012-09-20 | 에이비비 테크놀로지 아게 | 고전압 직류 회로 차단기 장치 및 방법 |
US8222954B1 (en) * | 2009-01-29 | 2012-07-17 | Xilinx, Inc. | Method and apparatus for a process, voltage, and temperature variation tolerant semiconductor device |
US8368385B2 (en) | 2009-09-25 | 2013-02-05 | Intel Corporation | Methods and systems to detect voltage changes within integrated circuits |
JP2011129237A (ja) * | 2009-12-21 | 2011-06-30 | Elpida Memory Inc | 半導体装置及び半導体記憶装置 |
TWI421665B (zh) | 2010-06-04 | 2014-01-01 | Univ Nat Sun Yat Sen | 角落偵測電路 |
US8410772B1 (en) * | 2010-11-29 | 2013-04-02 | Xilinx, Inc. | Bias circuit generating bias from supply and threshold voltages |
US8446791B2 (en) * | 2010-12-03 | 2013-05-21 | Oracle International Corporation | Process tolerant large-swing sense amplfier with latching capability |
US8159262B1 (en) * | 2011-02-18 | 2012-04-17 | Dipankar Bhattacharya | Impedance compensation in a buffer circuit |
US8604826B2 (en) * | 2011-12-16 | 2013-12-10 | Advanced Micro Devices, Inc. | Bias compensation method and system for minimizing process, voltage and temperature corner variations |
US8693264B2 (en) * | 2012-02-21 | 2014-04-08 | Lsi Corporation | Memory device having sensing circuitry with automatic latching of sense amplifier output node |
US20130258794A1 (en) * | 2012-03-29 | 2013-10-03 | Lsi Corporation | Memory device having control circuitry for sense amplifier reaction time tracking |
US8830766B2 (en) * | 2013-01-23 | 2014-09-09 | Lsi Corporation | Margin free PVT tolerant fast self-timed sense amplifier reset circuit |
KR102095856B1 (ko) * | 2013-04-15 | 2020-04-01 | 삼성전자주식회사 | 반도체 메모리 장치 및 그것의 바디 바이어스 방법 |
US9344305B2 (en) * | 2013-04-22 | 2016-05-17 | Samsung Display Co., Ltd. | PVT tolerant differential circuit |
TWI498892B (zh) * | 2013-09-27 | 2015-09-01 | Univ Nat Cheng Kung | 靜態隨機存取記憶體之自適應性資料保持電壓調節系統 |
US9189202B2 (en) * | 2013-12-23 | 2015-11-17 | The University Of Massachusetts | Generate random numbers using metastability resolution time |
KR20160009429A (ko) * | 2014-07-16 | 2016-01-26 | 삼성전자주식회사 | Pvt 변동에 둔감한 딜레이 컨트롤 시스템 및 그 제어 방법 |
US9912325B2 (en) | 2015-04-10 | 2018-03-06 | Drexel University | Power supply voltage detection and power delivery circuit |
US9959915B2 (en) * | 2015-12-11 | 2018-05-01 | Sandisk Technologies Llc | Voltage generator to compensate for process corner and temperature variations |
US10302509B2 (en) * | 2016-12-12 | 2019-05-28 | Invecas, Inc. | Temperature sensing for integrated circuits |
KR20190008653A (ko) * | 2017-07-17 | 2019-01-25 | 에스케이하이닉스 주식회사 | 프리차지 회로, 그를 이용한 메모리 장치 및 에스램 글로벌 카운터 |
-
2017
- 2017-12-22 FR FR1763173A patent/FR3076127B1/fr not_active Expired - Fee Related
-
2018
- 2018-12-03 EP EP18209928.3A patent/EP3503402A1/fr not_active Withdrawn
- 2018-12-13 US US16/219,552 patent/US10685700B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP3503402A1 (fr) | 2019-06-26 |
US20190198092A1 (en) | 2019-06-27 |
US10685700B2 (en) | 2020-06-16 |
FR3076127A1 (fr) | 2019-06-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PLFP | Fee payment |
Year of fee payment: 2 |
|
PLSC | Publication of the preliminary search report |
Effective date: 20190628 |
|
PLFP | Fee payment |
Year of fee payment: 3 |
|
PLFP | Fee payment |
Year of fee payment: 4 |
|
PLFP | Fee payment |
Year of fee payment: 5 |
|
ST | Notification of lapse |
Effective date: 20230808 |