FR2970593B1 - Cellule mémoire volatile/non volatile compacte - Google Patents
Cellule mémoire volatile/non volatile compacteInfo
- Publication number
- FR2970593B1 FR2970593B1 FR1150407A FR1150407A FR2970593B1 FR 2970593 B1 FR2970593 B1 FR 2970593B1 FR 1150407 A FR1150407 A FR 1150407A FR 1150407 A FR1150407 A FR 1150407A FR 2970593 B1 FR2970593 B1 FR 2970593B1
- Authority
- FR
- France
- Prior art keywords
- volatile
- transistor
- coupled
- memory cell
- compatible
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/003—Cell access
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
- G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1659—Cell access
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1675—Writing or programming circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1693—Timing circuits or methods
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
- G11C14/0054—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell
- G11C14/0081—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell and the nonvolatile element is a magnetic RAM [MRAM] element or ferromagnetic cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
- G11C14/0054—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell
- G11C14/009—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell and the nonvolatile element is a resistive RAM element, i.e. programmable resistors, e.g. formed of phase change or chalcogenide material
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17748—Structural details of configuration resources
- H03K19/1776—Structural details of configuration resources for memories
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Static Random-Access Memory (AREA)
Abstract
L'invention concerne un dispositif mémoire comprenant au moins une cellule mémoire comprenant : un premier transistor (102) couplé entre un premier noeud de mémorisation (106) et une première tension d'alimentation (GND, V ) ; un deuxième transistor (104) couplé entre un deuxième noeud de mémorisation (108) et la première tension d'alimentation, une borne de commande du premier transistor étant couplée au deuxième noeud de mémorisation, et une borne de commande du deuxième transistor étant couplée au premier noeud de mémorisation ; et un seul élément à commutation de résistance (202), l'unique élément à commutation de résistance étant couplé en série avec le premier transistor et étant programmable pour avoir l'une d'une première et d'une deuxième résistance (R , R ).
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1150407A FR2970593B1 (fr) | 2011-01-19 | 2011-01-19 | Cellule mémoire volatile/non volatile compacte |
EP12701708.5A EP2666165B1 (fr) | 2011-01-19 | 2012-01-19 | Cellule compacte de mémoire volatile / non volatile |
PCT/EP2012/050800 WO2012098197A1 (fr) | 2011-01-19 | 2012-01-19 | Cellule compacte de mémoire volatile / non volatile |
US13/980,529 US9224463B2 (en) | 2011-01-19 | 2012-01-19 | Compact volatile/non-volatile memory cell |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1150407A FR2970593B1 (fr) | 2011-01-19 | 2011-01-19 | Cellule mémoire volatile/non volatile compacte |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2970593A1 FR2970593A1 (fr) | 2012-07-20 |
FR2970593B1 true FR2970593B1 (fr) | 2013-08-02 |
Family
ID=45558039
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1150407A Active FR2970593B1 (fr) | 2011-01-19 | 2011-01-19 | Cellule mémoire volatile/non volatile compacte |
Country Status (4)
Country | Link |
---|---|
US (1) | US9224463B2 (fr) |
EP (1) | EP2666165B1 (fr) |
FR (1) | FR2970593B1 (fr) |
WO (1) | WO2012098197A1 (fr) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2970589B1 (fr) | 2011-01-19 | 2013-02-15 | Centre Nat Rech Scient | Cellule mémoire volatile/non volatile |
WO2013147831A1 (fr) * | 2012-03-30 | 2013-10-03 | Intel Corporation | Eléments de mémoire à base de couple de transfert de spin pour matrices de dispositifs programmables |
FR3004576B1 (fr) | 2013-04-15 | 2019-11-29 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Cellule memoire avec memorisation de donnees non volatile |
FR3004577A1 (fr) | 2013-04-15 | 2014-10-17 | Commissariat Energie Atomique | |
FR3008219B1 (fr) | 2013-07-05 | 2016-12-09 | Commissariat Energie Atomique | Dispositif a memoire non volatile |
CN106059567A (zh) * | 2016-05-27 | 2016-10-26 | 中电海康集团有限公司 | 一种基于stt‑mram的现场可编程门阵列 |
US10756267B2 (en) * | 2017-04-11 | 2020-08-25 | National Chiao Tung University | Nonvolatile memory comprising variable resistance transistors and method for operating the same |
CN111681694B (zh) * | 2019-03-11 | 2022-05-17 | 华邦电子股份有限公司 | 电阻式存储器电路 |
Family Cites Families (35)
Publication number | Priority date | Publication date | Assignee | Title |
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US4006469A (en) | 1975-12-16 | 1977-02-01 | International Business Machines Corporation | Data storage cell with transistors operating at different threshold voltages |
DE19548053A1 (de) | 1995-12-21 | 1997-07-03 | Siemens Ag | Verfahren zum Betrieb einer SRAM MOS-Transistor Speicherzelle |
US6172899B1 (en) * | 1998-05-08 | 2001-01-09 | Micron Technology. Inc. | Static-random-access-memory cell |
JP3983969B2 (ja) | 2000-03-08 | 2007-09-26 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JP3834787B2 (ja) * | 2001-11-22 | 2006-10-18 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 不揮発性ラッチ回路 |
US6687154B2 (en) | 2002-02-25 | 2004-02-03 | Aplus Flash Technology, Inc. | Highly-integrated flash memory and mask ROM array architecture |
WO2003085741A1 (fr) | 2002-04-10 | 2003-10-16 | Matsushita Electric Industrial Co., Ltd. | Bascule bistable non volatile |
JP3875139B2 (ja) | 2002-04-24 | 2007-01-31 | Necエレクトロニクス株式会社 | 不揮発性半導体記憶装置、そのデータ書き込み制御方法およびプログラム |
KR100479810B1 (ko) | 2002-12-30 | 2005-03-31 | 주식회사 하이닉스반도체 | 불휘발성 메모리 장치 |
WO2004090984A1 (fr) | 2003-04-03 | 2004-10-21 | Kabushiki Kaisha Toshiba | Dispositif de memoire a changement de phase |
JP3845734B2 (ja) * | 2004-11-16 | 2006-11-15 | 国立大学法人金沢大学 | 不揮発性メモリ |
DE102005001667B4 (de) * | 2005-01-13 | 2011-04-21 | Qimonda Ag | Nichtflüchtige Speicherzelle zum Speichern eines Datums in einer integrierten Schaltung |
US7764081B1 (en) | 2005-08-05 | 2010-07-27 | Xilinx, Inc. | Programmable logic device (PLD) with memory refresh based on single event upset (SEU) occurrence to maintain soft error immunity |
US7599210B2 (en) | 2005-08-19 | 2009-10-06 | Sony Corporation | Nonvolatile memory cell, storage device and nonvolatile logic circuit |
DE102005049232A1 (de) | 2005-10-14 | 2007-04-26 | Infineon Technologies Ag | Integrierter Schaltkreis und Verfahren zum Betreiben eines integrierten Schaltkreises |
JP5311784B2 (ja) | 2006-10-11 | 2013-10-09 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US7692954B2 (en) | 2007-03-12 | 2010-04-06 | International Business Machines Corporation | Apparatus and method for integrating nonvolatile memory capability within SRAM devices |
WO2009031231A1 (fr) * | 2007-09-07 | 2009-03-12 | Renesas Technology Corp. | Dispositif à semi-conducteur |
US7791941B2 (en) | 2007-10-26 | 2010-09-07 | Micron Technology, Inc. | Non-volatile SRAM cell |
JP5201487B2 (ja) * | 2007-12-06 | 2013-06-05 | 日本電気株式会社 | 不揮発性ラッチ回路 |
US20090190409A1 (en) | 2008-01-28 | 2009-07-30 | Rok Dittrich | Integrated Circuit, Cell Arrangement, Method for Operating an Integrated Circuit and for Operating a Cell Arrangement, Memory Module |
US7760538B1 (en) * | 2008-03-04 | 2010-07-20 | Xilinx, Inc. | Non-volatile SRAM cell |
US7796417B1 (en) * | 2008-04-14 | 2010-09-14 | Altera Corporation | Memory circuits having programmable non-volatile resistors |
US20090268513A1 (en) | 2008-04-29 | 2009-10-29 | Luca De Ambroggi | Memory device with different types of phase change memory |
US7961502B2 (en) | 2008-12-04 | 2011-06-14 | Qualcomm Incorporated | Non-volatile state retention latch |
US8194438B2 (en) | 2009-02-12 | 2012-06-05 | Seagate Technology Llc | nvSRAM having variable magnetic resistors |
US8605490B2 (en) | 2009-10-12 | 2013-12-10 | Micron Technology, Inc. | Non-volatile SRAM cell that incorporates phase-change memory into a CMOS process |
JP5359798B2 (ja) * | 2009-11-10 | 2013-12-04 | ソニー株式会社 | メモリデバイスおよびその読み出し方法 |
KR20110057601A (ko) | 2009-11-24 | 2011-06-01 | 삼성전자주식회사 | 비휘발성 논리 회로, 상기 비휘발성 논리 회로를 포함하는 집적 회로 및 상기 집적 회로의 동작 방법 |
WO2011066650A1 (fr) * | 2009-12-01 | 2011-06-09 | Queen's University At Kingston | Procédé et système pour architecture informatique reconfigurable au moment de l'exécution |
FR2966636B1 (fr) | 2010-10-26 | 2012-12-14 | Centre Nat Rech Scient | Element magnetique inscriptible |
FR2970589B1 (fr) | 2011-01-19 | 2013-02-15 | Centre Nat Rech Scient | Cellule mémoire volatile/non volatile |
FR2976712B1 (fr) * | 2011-06-15 | 2014-01-31 | Centre Nat Rech Scient | Element de memoire non-volatile |
TWI429062B (zh) | 2011-06-15 | 2014-03-01 | Ind Tech Res Inst | 非揮發性靜態隨機存取式記憶胞以及記憶體電路 |
US8773896B2 (en) | 2012-05-18 | 2014-07-08 | Alexander Mikhailovich Shukh | Nonvolatile latch circuit |
-
2011
- 2011-01-19 FR FR1150407A patent/FR2970593B1/fr active Active
-
2012
- 2012-01-19 EP EP12701708.5A patent/EP2666165B1/fr active Active
- 2012-01-19 US US13/980,529 patent/US9224463B2/en active Active
- 2012-01-19 WO PCT/EP2012/050800 patent/WO2012098197A1/fr active Application Filing
Also Published As
Publication number | Publication date |
---|---|
FR2970593A1 (fr) | 2012-07-20 |
WO2012098197A1 (fr) | 2012-07-26 |
EP2666165B1 (fr) | 2019-08-28 |
US20140043062A1 (en) | 2014-02-13 |
US9224463B2 (en) | 2015-12-29 |
EP2666165A1 (fr) | 2013-11-27 |
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