FR2963161B1 - Procede de realisation d?un circuit integre - Google Patents

Procede de realisation d?un circuit integre

Info

Publication number
FR2963161B1
FR2963161B1 FR1056070A FR1056070A FR2963161B1 FR 2963161 B1 FR2963161 B1 FR 2963161B1 FR 1056070 A FR1056070 A FR 1056070A FR 1056070 A FR1056070 A FR 1056070A FR 2963161 B1 FR2963161 B1 FR 2963161B1
Authority
FR
France
Prior art keywords
making
integrated circuit
integrated
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1056070A
Other languages
English (en)
Other versions
FR2963161A1 (fr
Inventor
Thierry Poiroux
Sebastien Barnola
Yves Morand
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Grenoble 2 SAS
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
STMicroelectronics Grenoble 2 SAS
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, STMicroelectronics Grenoble 2 SAS, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1056070A priority Critical patent/FR2963161B1/fr
Priority to US13/811,792 priority patent/US8877622B2/en
Priority to PCT/FR2011/051779 priority patent/WO2012010812A1/fr
Publication of FR2963161A1 publication Critical patent/FR2963161A1/fr
Application granted granted Critical
Publication of FR2963161B1 publication Critical patent/FR2963161B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823468—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H01L21/823456—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different shapes, lengths or dimensions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823475—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type interconnection or wiring or contact manufacturing related aspects
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
FR1056070A 2010-07-23 2010-07-23 Procede de realisation d?un circuit integre Active FR2963161B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR1056070A FR2963161B1 (fr) 2010-07-23 2010-07-23 Procede de realisation d?un circuit integre
US13/811,792 US8877622B2 (en) 2010-07-23 2011-07-22 Process for producing an integrated circuit
PCT/FR2011/051779 WO2012010812A1 (fr) 2010-07-23 2011-07-22 Procede de realisation d'un circuit integre

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1056070A FR2963161B1 (fr) 2010-07-23 2010-07-23 Procede de realisation d?un circuit integre

Publications (2)

Publication Number Publication Date
FR2963161A1 FR2963161A1 (fr) 2012-01-27
FR2963161B1 true FR2963161B1 (fr) 2012-08-24

Family

ID=43532710

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1056070A Active FR2963161B1 (fr) 2010-07-23 2010-07-23 Procede de realisation d?un circuit integre

Country Status (3)

Country Link
US (1) US8877622B2 (fr)
FR (1) FR2963161B1 (fr)
WO (1) WO2012010812A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3020500B1 (fr) 2014-04-24 2017-09-01 Commissariat Energie Atomique Procede de fabrication d'un transistor a effet de champ ameliore
KR20160013756A (ko) * 2014-07-28 2016-02-05 에스케이하이닉스 주식회사 연결구조물, 반도체 장치 및 그 제조 방법
FR3064083B1 (fr) * 2017-03-14 2021-06-04 Commissariat Energie Atomique Filtre interferentiel

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5120668A (en) * 1991-07-10 1992-06-09 Ibm Corporation Method of forming an inverse T-gate FET transistor
JP2606143B2 (ja) * 1994-07-22 1997-04-30 日本電気株式会社 半導体装置及びその製造方法
US6207543B1 (en) * 1997-06-30 2001-03-27 Vlsi Technology, Inc. Metallization technique for gate electrodes and local interconnects
JP2000082750A (ja) * 1998-07-10 2000-03-21 Oki Electric Ind Co Ltd 半導体装置の製造方法
KR100356773B1 (ko) * 2000-02-11 2002-10-18 삼성전자 주식회사 플래쉬 메모리 장치 및 그 형성 방법
US20030036240A1 (en) * 2001-08-17 2003-02-20 Trivedi Jigish D. Method of simultaneous formation of local interconnect and gate electrode
JP4360780B2 (ja) * 2002-07-26 2009-11-11 株式会社ルネサステクノロジ 半導体装置の製造方法
CN1327490C (zh) * 2003-10-27 2007-07-18 上海宏力半导体制造有限公司 用于制造自行对准接触窗结构的方法
CN1956186A (zh) * 2005-10-27 2007-05-02 松下电器产业株式会社 半导体装置及其制造方法
US20080290429A1 (en) * 2007-05-23 2008-11-27 Hynix Semiconductor Inc. Semiconductor device and method for fabricating the same
US7632736B2 (en) 2007-12-18 2009-12-15 Intel Corporation Self-aligned contact formation utilizing sacrificial polysilicon
TW201007885A (en) 2008-07-18 2010-02-16 Nec Electronics Corp Manufacturing method of semiconductor device, and semiconductor device

Also Published As

Publication number Publication date
WO2012010812A1 (fr) 2012-01-26
US8877622B2 (en) 2014-11-04
FR2963161A1 (fr) 2012-01-27
US20130252412A1 (en) 2013-09-26

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