FR2931586B1 - Procede de fabrication et de test d'un circuit electronique integre - Google Patents

Procede de fabrication et de test d'un circuit electronique integre

Info

Publication number
FR2931586B1
FR2931586B1 FR0853337A FR0853337A FR2931586B1 FR 2931586 B1 FR2931586 B1 FR 2931586B1 FR 0853337 A FR0853337 A FR 0853337A FR 0853337 A FR0853337 A FR 0853337A FR 2931586 B1 FR2931586 B1 FR 2931586B1
Authority
FR
France
Prior art keywords
integrated circuit
testing
manufacturing
pads
electronic circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0853337A
Other languages
English (en)
Other versions
FR2931586A1 (fr
Inventor
Romain Coffy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Grenoble 2 SAS
Original Assignee
STMicroelectronics Grenoble 2 SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Grenoble 2 SAS filed Critical STMicroelectronics Grenoble 2 SAS
Priority to FR0853337A priority Critical patent/FR2931586B1/fr
Priority to EP09749892A priority patent/EP2277056A1/fr
Priority to CN2009801183492A priority patent/CN102037370A/zh
Priority to US12/990,684 priority patent/US8232113B2/en
Priority to PCT/EP2009/056183 priority patent/WO2009141402A1/fr
Publication of FR2931586A1 publication Critical patent/FR2931586A1/fr
Application granted granted Critical
Publication of FR2931586B1 publication Critical patent/FR2931586B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/04—Housings; Supporting members; Arrangements of terminals
    • G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G—PHYSICS
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    • G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
    • G01R31/2822—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere of microwave or radiofrequency circuits
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    • H01L22/32—Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049—Nitrides composed of metals from groups of the periodic table
    • H01L2924/0504—14th Group
    • H01L2924/05042—Si3N4
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30105—Capacitance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
FR0853337A 2008-05-22 2008-05-22 Procede de fabrication et de test d'un circuit electronique integre Expired - Fee Related FR2931586B1 (fr)

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FR0853337A FR2931586B1 (fr) 2008-05-22 2008-05-22 Procede de fabrication et de test d'un circuit electronique integre
EP09749892A EP2277056A1 (fr) 2008-05-22 2009-05-20 Procédé de fabrication et de test d'un circuit électronique intégré
CN2009801183492A CN102037370A (zh) 2008-05-22 2009-05-20 制造和测试集成电路的方法
US12/990,684 US8232113B2 (en) 2008-05-22 2009-05-20 Method for manufacturing and testing an integrated electronic circuit
PCT/EP2009/056183 WO2009141402A1 (fr) 2008-05-22 2009-05-20 Procédé de fabrication et de test d'un circuit électronique intégré

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US8558229B2 (en) * 2011-12-07 2013-10-15 Taiwan Semiconductor Manufacturing Company, Ltd. Passivation layer for packaged chip
CN102723311B (zh) * 2012-06-29 2014-11-05 京东方科技集团股份有限公司 阵列基板制作方法
TWI490994B (zh) * 2012-09-03 2015-07-01 矽品精密工業股份有限公司 半導體封裝件中之連接結構
US9006899B2 (en) * 2012-12-14 2015-04-14 Infineon Technologies Ag Layer stack
US9082626B2 (en) * 2013-07-26 2015-07-14 Infineon Technologies Ag Conductive pads and methods of formation thereof
US9691686B2 (en) * 2014-05-28 2017-06-27 Taiwan Semiconductor Manufacturing Company, Ltd. Contact pad for semiconductor device
US9786620B2 (en) * 2015-07-27 2017-10-10 Infineon Technolgies Ag Semiconductor device and a method for manufacturing a semiconductor device
DE102018124497B4 (de) 2018-10-04 2022-06-30 Infineon Technologies Ag Halbleitervorrichtung und Verfahren zum Bilden einer Halbleitervorrichtung
TWI738193B (zh) * 2020-01-22 2021-09-01 復格企業股份有限公司 晶片封裝的製程內測試方法及裝置
CN117497483B (zh) * 2023-12-27 2024-04-12 日月新半导体(昆山)有限公司 集成电路制造方法以及集成电路装置

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US8232113B2 (en) 2012-07-31
EP2277056A1 (fr) 2011-01-26
FR2931586A1 (fr) 2009-11-27
WO2009141402A1 (fr) 2009-11-26
US20110092000A1 (en) 2011-04-21

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