FR2716004B1 - Appareil de mesure de taux d'erreurs sur les bits. - Google Patents

Appareil de mesure de taux d'erreurs sur les bits.

Info

Publication number
FR2716004B1
FR2716004B1 FR9501495A FR9501495A FR2716004B1 FR 2716004 B1 FR2716004 B1 FR 2716004B1 FR 9501495 A FR9501495 A FR 9501495A FR 9501495 A FR9501495 A FR 9501495A FR 2716004 B1 FR2716004 B1 FR 2716004B1
Authority
FR
France
Prior art keywords
measuring device
error rate
bit error
rate measuring
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9501495A
Other languages
English (en)
Other versions
FR2716004A1 (fr
Inventor
Kazuhiro Shimawaki
Tetsuo Sotome
Takayuki Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of FR2716004A1 publication Critical patent/FR2716004A1/fr
Application granted granted Critical
Publication of FR2716004B1 publication Critical patent/FR2716004B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/24—Testing correct operation
    • H04L1/242—Testing correct operation by comparing a transmitted test signal with a locally generated replica
    • H04L1/244—Testing correct operation by comparing a transmitted test signal with a locally generated replica test sequence generators

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
FR9501495A 1994-02-09 1995-02-09 Appareil de mesure de taux d'erreurs sur les bits. Expired - Fee Related FR2716004B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6036527A JPH07225263A (ja) 1994-02-09 1994-02-09 ビット誤り測定器

Publications (2)

Publication Number Publication Date
FR2716004A1 FR2716004A1 (fr) 1995-08-11
FR2716004B1 true FR2716004B1 (fr) 1998-07-17

Family

ID=12472277

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9501495A Expired - Fee Related FR2716004B1 (fr) 1994-02-09 1995-02-09 Appareil de mesure de taux d'erreurs sur les bits.

Country Status (4)

Country Link
US (1) US5623497A (fr)
JP (1) JPH07225263A (fr)
FR (1) FR2716004B1 (fr)
GB (1) GB2286473B (fr)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19653429C2 (de) * 1996-12-20 1998-10-15 Siemens Ag Verfahren zur Überprüfung der Funktionsfähigkeit einer Recheneinheit
JPH11163838A (ja) * 1997-11-26 1999-06-18 Ando Electric Co Ltd モデム装置のビットエラー測定装置及びそのビットエラー測定方法
JPH11163837A (ja) * 1997-11-26 1999-06-18 Ando Electric Co Ltd モデム装置のビットエラー測定装置及びそのビットエラー測定方法
JP3123975B2 (ja) * 1998-04-23 2001-01-15 埼玉日本電気株式会社 ビット誤り率測定方法および測定回路ならびに受信装置
EP0961437A1 (fr) * 1998-05-29 1999-12-01 Alcatel Méthode de mesure du taux d'erreur binaire dans un système de télécommunications à cellules
US6643788B1 (en) * 1998-11-30 2003-11-04 Raytheon Company Method for detecting a number of consecutive valid data frames and advancing into a lock mode to monitor synchronization patterns within a synchronization window
US6765954B1 (en) * 1999-08-16 2004-07-20 Globespanvirata, Inc. System and method for implementing a delta-sigma modulator integrity supervisor
US6295614B1 (en) 2000-03-02 2001-09-25 Corning Incorporated Apparatus for estimating bit error rate by sampling in WDM communication system
US6961879B1 (en) * 2000-05-23 2005-11-01 Zoran Corporation Apparatus and method for counting error rates in an optical compact disc storage system
US6795941B2 (en) * 2000-12-21 2004-09-21 Honeywell International Inc. Method for diagnosing a network
US6983403B2 (en) * 2001-03-02 2006-01-03 Luminous Networks, Inc. Detecting bit errors in a communications system
EP1241483B1 (fr) * 2001-03-16 2004-05-19 Agilent Technologies, Inc. (a Delaware corporation) Mesure du taux d'erreurs sur les bits
US6816988B2 (en) * 2001-08-31 2004-11-09 Agilent Technologies, Inc. Method and system for minimal-time bit-error-rate testing
US7231558B2 (en) 2002-03-18 2007-06-12 Finisar Corporation System and method for network error rate testing
US7032139B1 (en) * 2002-03-18 2006-04-18 Finisar Corporation Bit error rate tester
EP1385014B1 (fr) * 2002-07-25 2006-02-08 Agilent Technologies Inc. a Delaware Corporation Echantillonage de signal avec des trajets d'échantillonage et de référence
JP4511889B2 (ja) * 2004-07-20 2010-07-28 株式会社アドバンテスト 試験装置及び試験方法
JP4511880B2 (ja) * 2004-06-17 2010-07-28 株式会社アドバンテスト 試験装置及び試験方法
JP4511882B2 (ja) * 2004-06-21 2010-07-28 株式会社アドバンテスト 試験装置及び試験方法
US7623783B2 (en) * 2004-08-10 2009-11-24 Hewlett-Packard Development Company, L.P. System and method of self-configuring optical communication channels between arrays of emitters and detectors
US7853837B2 (en) * 2004-09-10 2010-12-14 Rambus Inc. Memory controller and method for operating a memory controller having an integrated bit error rate circuit
US7246274B2 (en) * 2004-09-10 2007-07-17 Rambus Inc. Method and apparatus for estimating random jitter (RJ) and deterministic jitter (DJ) from bit error rate (BER)
US7386767B1 (en) * 2004-10-05 2008-06-10 Altera Corporation Programmable bit error rate monitor for serial interface
DE102004050402A1 (de) * 2004-10-15 2006-04-27 Marconi Communications Gmbh Verfahren und Vorrichtung zum Erkennen eines Störeffekts in einem Nachrichtenkanal
EP1653649A1 (fr) * 2004-10-28 2006-05-03 Agilent Technologies, Inc. Système et procédé de détermination du taux d'erreurs d'un signal numérique
US20060200710A1 (en) * 2005-03-04 2006-09-07 Azea Networks, Ltd. Bit error rate performance estimation and control
US8189686B2 (en) * 2006-03-03 2012-05-29 David John Boyes Systems and methods for visualizing errors in video signals
DE112007000761T5 (de) 2006-03-31 2009-04-02 Anritsu Corp., Atsugi Signalanalysevorrichtung
US7932761B1 (en) * 2009-02-09 2011-04-26 Altera Corporation Fine tuned pulse width modulation
US8335950B2 (en) * 2009-08-12 2012-12-18 Tektronix, Inc. Test and measurement instrument with bit-error detection
US8627156B1 (en) * 2010-10-26 2014-01-07 Agilent Technologies, Inc. Method and system of testing bit error rate using signal with mixture of scrambled and unscrambled bits
DE112019002970T5 (de) * 2018-06-14 2021-02-25 Tektronix, Inc. Prüfung integrierter kommunikationsverbindungen

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH531282A (de) * 1970-04-29 1972-11-30 Siemens Ag Verfahren zum Messen der Bit- und Blockfehlerhäufigkeit mit wählbarer Blocklänge bei der Übertragung von binärcodierten Datenzeichen
US3851251A (en) * 1971-10-25 1974-11-26 Martin Marietta Corp Receiver method and apparatus
US4385384A (en) * 1977-06-06 1983-05-24 Racal Data Communications Inc. Modem diagnostic and control system
JPS63156444A (ja) * 1986-12-19 1988-06-29 Mitsubishi Electric Corp 時分割多元接続システム用疑似ビツト誤り率測定回路
JP2851879B2 (ja) * 1989-09-19 1999-01-27 富士通株式会社 データ通信装置
US5305323A (en) * 1992-06-25 1994-04-19 Siemens Stromberg-Carlson Technique for digitally detecting bit-error densities that occur in a serial bit stream
GB2281136B (en) * 1993-08-11 1997-09-24 Hewlett Packard Ltd Bit error-rate testing

Also Published As

Publication number Publication date
GB2286473B (en) 1997-07-30
FR2716004A1 (fr) 1995-08-11
GB2286473A (en) 1995-08-16
GB9502438D0 (en) 1995-03-29
JPH07225263A (ja) 1995-08-22
US5623497A (en) 1997-04-22

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Legal Events

Date Code Title Description
ST Notification of lapse