FR2633742B1 - Micro-ordinateur contenu dans une carte a circuit integre - Google Patents
Micro-ordinateur contenu dans une carte a circuit integreInfo
- Publication number
- FR2633742B1 FR2633742B1 FR8813215A FR8813215A FR2633742B1 FR 2633742 B1 FR2633742 B1 FR 2633742B1 FR 8813215 A FR8813215 A FR 8813215A FR 8813215 A FR8813215 A FR 8813215A FR 2633742 B1 FR2633742 B1 FR 2633742B1
- Authority
- FR
- France
- Prior art keywords
- integrated circuit
- circuit card
- micro computer
- computer contained
- contained
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/32—Timing circuits
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Microcomputers (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16074388A JPH06101043B2 (ja) | 1988-06-30 | 1988-06-30 | マイクロコンピュータ |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2633742A1 FR2633742A1 (fr) | 1990-01-05 |
FR2633742B1 true FR2633742B1 (fr) | 1993-10-15 |
Family
ID=15721495
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR8813215A Expired - Fee Related FR2633742B1 (fr) | 1988-06-30 | 1988-10-07 | Micro-ordinateur contenu dans une carte a circuit integre |
Country Status (4)
Country | Link |
---|---|
US (1) | US5047924A (fr) |
JP (1) | JPH06101043B2 (fr) |
DE (1) | DE3834227A1 (fr) |
FR (1) | FR2633742B1 (fr) |
Families Citing this family (47)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5636367A (en) * | 1991-02-27 | 1997-06-03 | Vlsi Technology, Inc. | N+0.5 wait state programmable DRAM controller |
US5319772A (en) * | 1991-11-14 | 1994-06-07 | Acer Incorporated | Method and apparatus for changing the operating clock speed of a computer system |
US5734877A (en) * | 1992-09-09 | 1998-03-31 | Silicon Graphics, Inc. | Processor chip having on-chip circuitry for generating a programmable external clock signal and for controlling data patterns |
DE4231703C2 (de) * | 1992-09-22 | 1996-01-11 | Siemens Ag | Mikroprozessor mit CPU und EEPROM |
EP0602422A1 (fr) * | 1992-12-15 | 1994-06-22 | International Business Machines Corporation | Changement dynamique de fréquence avec des générateurs d'horloge à division par un |
GB9417270D0 (en) * | 1994-08-26 | 1994-10-19 | Inmos Ltd | Timing circuit |
US7266725B2 (en) | 2001-09-03 | 2007-09-04 | Pact Xpp Technologies Ag | Method for debugging reconfigurable architectures |
JP3493096B2 (ja) * | 1996-06-07 | 2004-02-03 | 株式会社東芝 | 半導体集積回路、icカード、及びicカードシステム |
DE19651075A1 (de) | 1996-12-09 | 1998-06-10 | Pact Inf Tech Gmbh | Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen |
DE19654595A1 (de) | 1996-12-20 | 1998-07-02 | Pact Inf Tech Gmbh | I0- und Speicherbussystem für DFPs sowie Bausteinen mit zwei- oder mehrdimensionaler programmierbaren Zellstrukturen |
DE19654593A1 (de) | 1996-12-20 | 1998-07-02 | Pact Inf Tech Gmbh | Umkonfigurierungs-Verfahren für programmierbare Bausteine zur Laufzeit |
JP3961028B2 (ja) | 1996-12-27 | 2007-08-15 | ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト | データフロープロセッサ(dfp)の自動的なダイナミックアンロード方法並びに2次元または3次元のプログラミング可能なセルストラクチャを有するモジュール(fpga,dpga等) |
DE19654846A1 (de) | 1996-12-27 | 1998-07-09 | Pact Inf Tech Gmbh | Verfahren zum selbständigen dynamischen Umladen von Datenflußprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o. dgl.) |
DE19704728A1 (de) | 1997-02-08 | 1998-08-13 | Pact Inf Tech Gmbh | Verfahren zur Selbstsynchronisation von konfigurierbaren Elementen eines programmierbaren Bausteines |
US6542998B1 (en) | 1997-02-08 | 2003-04-01 | Pact Gmbh | Method of self-synchronization of configurable elements of a programmable module |
DE19704742A1 (de) * | 1997-02-11 | 1998-09-24 | Pact Inf Tech Gmbh | Internes Bussystem für DFPs, sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen, zur Bewältigung großer Datenmengen mit hohem Vernetzungsaufwand |
US8686549B2 (en) | 2001-09-03 | 2014-04-01 | Martin Vorbach | Reconfigurable elements |
DE19861088A1 (de) | 1997-12-22 | 2000-02-10 | Pact Inf Tech Gmbh | Verfahren zur Reparatur von integrierten Schaltkreisen |
WO2000077652A2 (fr) | 1999-06-10 | 2000-12-21 | Pact Informationstechnologie Gmbh | Partionnement de sequences dans des structures cellulaires |
JP2001297316A (ja) | 2000-04-14 | 2001-10-26 | Mitsubishi Electric Corp | メモリカード及びその制御方法 |
EP2226732A3 (fr) | 2000-06-13 | 2016-04-06 | PACT XPP Technologies AG | Hiérarchie d'antémémoires pour un processeur multi-coeur |
US8058899B2 (en) | 2000-10-06 | 2011-11-15 | Martin Vorbach | Logic cell array and bus system |
ATE437476T1 (de) | 2000-10-06 | 2009-08-15 | Pact Xpp Technologies Ag | Zellenanordnung mit segmentierter zwischenzellstruktur |
US6990555B2 (en) | 2001-01-09 | 2006-01-24 | Pact Xpp Technologies Ag | Method of hierarchical caching of configuration data having dataflow processors and modules having two- or multidimensional programmable cell structure (FPGAs, DPGAs, etc.) |
EP1540507B1 (fr) * | 2001-03-05 | 2012-05-23 | Richter, Thomas | Dispositif pour traiter des données avec un réseau d'élements reconfigurables |
US9037807B2 (en) | 2001-03-05 | 2015-05-19 | Pact Xpp Technologies Ag | Processor arrangement on a chip including data processing, memory, and interface elements |
US7444531B2 (en) | 2001-03-05 | 2008-10-28 | Pact Xpp Technologies Ag | Methods and devices for treating and processing data |
US7581076B2 (en) | 2001-03-05 | 2009-08-25 | Pact Xpp Technologies Ag | Methods and devices for treating and/or processing data |
US7844796B2 (en) | 2001-03-05 | 2010-11-30 | Martin Vorbach | Data processing device and method |
US7210129B2 (en) | 2001-08-16 | 2007-04-24 | Pact Xpp Technologies Ag | Method for translating programs for reconfigurable architectures |
EP1402382B1 (fr) | 2001-06-20 | 2010-08-18 | Richter, Thomas | Procede de traitement de donnees |
US7996827B2 (en) | 2001-08-16 | 2011-08-09 | Martin Vorbach | Method for the translation of programs for reconfigurable architectures |
US7434191B2 (en) | 2001-09-03 | 2008-10-07 | Pact Xpp Technologies Ag | Router |
US8686475B2 (en) | 2001-09-19 | 2014-04-01 | Pact Xpp Technologies Ag | Reconfigurable elements |
US7577822B2 (en) | 2001-12-14 | 2009-08-18 | Pact Xpp Technologies Ag | Parallel task operation in processor and reconfigurable coprocessor configured based on information in link list including termination information for synchronization |
DE10392560D2 (de) | 2002-01-19 | 2005-05-12 | Pact Xpp Technologies Ag | Reconfigurierbarer Prozessor |
DE10390689D2 (de) | 2002-02-18 | 2005-02-10 | Pact Xpp Technologies Ag | Bussysteme und Rekonfigurationsverfahren |
US8914590B2 (en) | 2002-08-07 | 2014-12-16 | Pact Xpp Technologies Ag | Data processing method and device |
US7657861B2 (en) | 2002-08-07 | 2010-02-02 | Pact Xpp Technologies Ag | Method and device for processing data |
WO2005010632A2 (fr) * | 2003-06-17 | 2005-02-03 | Pact Xpp Technologies Ag | Dispositif et procede de traitement de donnees |
WO2004021176A2 (fr) | 2002-08-07 | 2004-03-11 | Pact Xpp Technologies Ag | Procede et dispositif de traitement de donnees |
AU2003289844A1 (en) | 2002-09-06 | 2004-05-13 | Pact Xpp Technologies Ag | Reconfigurable sequencer structure |
EP1676208A2 (fr) | 2003-08-28 | 2006-07-05 | PACT XPP Technologies AG | Dispositif et procede de traitement de donnees |
JP4662019B2 (ja) * | 2004-06-18 | 2011-03-30 | セイコーエプソン株式会社 | 集積回路装置及び電子機器 |
US8250503B2 (en) | 2006-01-18 | 2012-08-21 | Martin Vorbach | Hardware definition method including determining whether to implement a function as hardware or software |
KR101506337B1 (ko) * | 2008-03-07 | 2015-03-26 | 삼성전자주식회사 | 스마트 카드 시스템 및 그 구동 방법 |
US20100272811A1 (en) * | 2008-07-23 | 2010-10-28 | Alkermes,Inc. | Complex of trospium and pharmaceutical compositions thereof |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6038740B2 (ja) * | 1976-04-19 | 1985-09-03 | 株式会社東芝 | デ−タ処理装置 |
JPS53132245A (en) * | 1977-04-25 | 1978-11-17 | Hitachi Ltd | Subminiature computer |
JPS56140459A (en) * | 1980-04-04 | 1981-11-02 | Hitachi Ltd | Data processing system |
JP2510521B2 (ja) * | 1986-06-18 | 1996-06-26 | 株式会社日立製作所 | Eeprom装置 |
JPS63106996A (ja) * | 1986-10-24 | 1988-05-12 | Hitachi Ltd | 半導体集積回路装置 |
JPS63131616A (ja) * | 1986-11-20 | 1988-06-03 | Mitsubishi Electric Corp | プログラマブルクロツク分周器 |
JP2569514B2 (ja) * | 1986-12-12 | 1997-01-08 | 株式会社日立製作所 | 情報処理装置 |
-
1988
- 1988-06-30 JP JP16074388A patent/JPH06101043B2/ja not_active Expired - Fee Related
- 1988-10-07 DE DE3834227A patent/DE3834227A1/de active Granted
- 1988-10-07 FR FR8813215A patent/FR2633742B1/fr not_active Expired - Fee Related
- 1988-12-02 US US07/279,029 patent/US5047924A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
FR2633742A1 (fr) | 1990-01-05 |
DE3834227C2 (fr) | 1992-12-24 |
JPH06101043B2 (ja) | 1994-12-12 |
DE3834227A1 (de) | 1990-01-04 |
JPH0212475A (ja) | 1990-01-17 |
US5047924A (en) | 1991-09-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
D6 | Patent endorsed licences of rights | ||
ST | Notification of lapse |
Effective date: 20060630 |