FR2529715A1 - Procede d'optimisation du dopage dans un transistor mos - Google Patents
Procede d'optimisation du dopage dans un transistor mos Download PDFInfo
- Publication number
- FR2529715A1 FR2529715A1 FR8211571A FR8211571A FR2529715A1 FR 2529715 A1 FR2529715 A1 FR 2529715A1 FR 8211571 A FR8211571 A FR 8211571A FR 8211571 A FR8211571 A FR 8211571A FR 2529715 A1 FR2529715 A1 FR 2529715A1
- Authority
- FR
- France
- Prior art keywords
- ions
- type
- substrate
- doping
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H10P30/21—
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
- H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/351—Substrate regions of field-effect devices
- H10D62/357—Substrate regions of field-effect devices of FETs
- H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
- H10D62/371—Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
-
- H10P30/204—
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Bipolar Transistors (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR8211571A FR2529715A1 (fr) | 1982-07-01 | 1982-07-01 | Procede d'optimisation du dopage dans un transistor mos |
| EP83401331A EP0099787A1 (fr) | 1982-07-01 | 1983-06-28 | Procédé d'optimisation du dopage dans un transistor MOS |
| JP58118387A JPS5921068A (ja) | 1982-07-01 | 1983-07-01 | Mosトランジスタにおけるド−ピング最適化方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR8211571A FR2529715A1 (fr) | 1982-07-01 | 1982-07-01 | Procede d'optimisation du dopage dans un transistor mos |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2529715A1 true FR2529715A1 (fr) | 1984-01-06 |
| FR2529715B1 FR2529715B1 (cg-RX-API-DMAC10.html) | 1984-12-21 |
Family
ID=9275586
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR8211571A Granted FR2529715A1 (fr) | 1982-07-01 | 1982-07-01 | Procede d'optimisation du dopage dans un transistor mos |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP0099787A1 (cg-RX-API-DMAC10.html) |
| JP (1) | JPS5921068A (cg-RX-API-DMAC10.html) |
| FR (1) | FR2529715A1 (cg-RX-API-DMAC10.html) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0255882A3 (de) * | 1986-08-07 | 1990-05-30 | Siemens Aktiengesellschaft | npn-Bipolartransistor mit extrem flachen Emitter/Basis-Strukturen und Verfahren zu seiner Herstellung |
| US4889819A (en) * | 1988-05-20 | 1989-12-26 | International Business Machines Corporation | Method for fabricating shallow junctions by preamorphizing with dopant of same conductivity as substrate |
| EP0359530A3 (en) * | 1988-09-15 | 1991-01-02 | Advanced Micro Devices, Inc. | Capacitive reduction of junctions in a semiconductor device |
| DE69027312T2 (de) * | 1989-03-02 | 1997-01-30 | Thunderbird Tech Inc | Feldeffekttransistor mit fermi-schwellenspannung |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2337428A1 (fr) * | 1975-12-31 | 1977-07-29 | Ibm | Transistor a effet de champ a canal composite et procede de fabrication |
-
1982
- 1982-07-01 FR FR8211571A patent/FR2529715A1/fr active Granted
-
1983
- 1983-06-28 EP EP83401331A patent/EP0099787A1/fr not_active Withdrawn
- 1983-07-01 JP JP58118387A patent/JPS5921068A/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2337428A1 (fr) * | 1975-12-31 | 1977-07-29 | Ibm | Transistor a effet de champ a canal composite et procede de fabrication |
Non-Patent Citations (4)
| Title |
|---|
| APPLIED PHYSICS LETTERS, volume 35, no. 8, octobre 1979 (NEW YORK, US) M. KOYANAGI et al. "Short-channel MOS FET's fabricated by self-aligned ion implantation and laser-annealing", pages 621-623 * |
| IBM TECHNICAL DISCLOSURE BULLETIN, volume 17, no. 4, septembre 1974 (NEW YORK; US) D.R. YOUNG "Metal-oxide semiconductor field-effect transistor structure", pages 1208-1209 * |
| IEEE ELECTRON DEVICES, volume ED-27, no. 8, août 1980 (NEW YORK, US) R.F. MOTTA et al. "Computer-aided device optimization for MOS/VLSI", pages 1559-1565 * |
| IEEE JOURNAL OF SOLID-STATE CIRCUITS, volume SC-14, no. 3, juin 1979 (NEW YORK; US) J. PEREIRA DE SOUZA et al. "A simplified self-aligned al-gate MOS technology for high performance depletion-logic circuits", pages 651-653 * |
Also Published As
| Publication number | Publication date |
|---|---|
| FR2529715B1 (cg-RX-API-DMAC10.html) | 1984-12-21 |
| JPS5921068A (ja) | 1984-02-02 |
| EP0099787A1 (fr) | 1984-02-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |