FR2504730A1 - Procede de fabrication de circuits integres mos a plusieurs types d'interconnexions - Google Patents

Procede de fabrication de circuits integres mos a plusieurs types d'interconnexions Download PDF

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Publication number
FR2504730A1
FR2504730A1 FR8108440A FR8108440A FR2504730A1 FR 2504730 A1 FR2504730 A1 FR 2504730A1 FR 8108440 A FR8108440 A FR 8108440A FR 8108440 A FR8108440 A FR 8108440A FR 2504730 A1 FR2504730 A1 FR 2504730A1
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FR
France
Prior art keywords
regions
substrate
polycrystalline silicon
oxide
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR8108440A
Other languages
English (en)
French (fr)
Other versions
FR2504730B1 (enExample
Inventor
Guy Dubois
Jean-Pierre Brevignon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EFCIS
Original Assignee
EFCIS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EFCIS filed Critical EFCIS
Priority to FR8108440A priority Critical patent/FR2504730A1/fr
Publication of FR2504730A1 publication Critical patent/FR2504730A1/fr
Application granted granted Critical
Publication of FR2504730B1 publication Critical patent/FR2504730B1/fr
Granted legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
FR8108440A 1981-04-28 1981-04-28 Procede de fabrication de circuits integres mos a plusieurs types d'interconnexions Granted FR2504730A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR8108440A FR2504730A1 (fr) 1981-04-28 1981-04-28 Procede de fabrication de circuits integres mos a plusieurs types d'interconnexions

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8108440A FR2504730A1 (fr) 1981-04-28 1981-04-28 Procede de fabrication de circuits integres mos a plusieurs types d'interconnexions

Publications (2)

Publication Number Publication Date
FR2504730A1 true FR2504730A1 (fr) 1982-10-29
FR2504730B1 FR2504730B1 (enExample) 1984-10-12

Family

ID=9257865

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8108440A Granted FR2504730A1 (fr) 1981-04-28 1981-04-28 Procede de fabrication de circuits integres mos a plusieurs types d'interconnexions

Country Status (1)

Country Link
FR (1) FR2504730A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0694846A1 (fr) * 1994-07-29 1996-01-31 STMicroelectronics S.A. Procédé de brouillage numérique et application à un circuit programmable

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4080618A (en) * 1975-09-05 1978-03-21 Tokyo Shibaura Electric Co., Ltd. Insulated-gate field-effect transistor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4080618A (en) * 1975-09-05 1978-03-21 Tokyo Shibaura Electric Co., Ltd. Insulated-gate field-effect transistor

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
EXBK/78 *
EXBK/79 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0694846A1 (fr) * 1994-07-29 1996-01-31 STMicroelectronics S.A. Procédé de brouillage numérique et application à un circuit programmable
US5850452A (en) * 1994-07-29 1998-12-15 Stmicroelectronics S.A. Method for numerically scrambling data and its application to a programmable circuit

Also Published As

Publication number Publication date
FR2504730B1 (enExample) 1984-10-12

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