FR2499748B1 - Circuit integre a fonction de memoire - Google Patents
Circuit integre a fonction de memoireInfo
- Publication number
- FR2499748B1 FR2499748B1 FR8102513A FR8102513A FR2499748B1 FR 2499748 B1 FR2499748 B1 FR 2499748B1 FR 8102513 A FR8102513 A FR 8102513A FR 8102513 A FR8102513 A FR 8102513A FR 2499748 B1 FR2499748 B1 FR 2499748B1
- Authority
- FR
- France
- Prior art keywords
- integrated circuit
- memory function
- memory
- function
- integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
- G11C11/416—Read-write [R-W] circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
- G11C11/4116—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access via separately connected emittors of said transistors or via multiple emittors, e.g. T2L, ECL
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8102513A FR2499748B1 (fr) | 1981-02-09 | 1981-02-09 | Circuit integre a fonction de memoire |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8102513A FR2499748B1 (fr) | 1981-02-09 | 1981-02-09 | Circuit integre a fonction de memoire |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2499748A1 FR2499748A1 (fr) | 1982-08-13 |
FR2499748B1 true FR2499748B1 (fr) | 1986-12-05 |
Family
ID=9254995
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR8102513A Expired FR2499748B1 (fr) | 1981-02-09 | 1981-02-09 | Circuit integre a fonction de memoire |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR2499748B1 (fr) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3585113B2 (ja) * | 2000-06-23 | 2004-11-04 | 松下電器産業株式会社 | 電流源セル配置構造、電流源セル選択方法及び電流加算型da変換器 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4172291A (en) * | 1978-08-07 | 1979-10-23 | Fairchild Camera And Instrument Corp. | Preset circuit for information storage devices |
-
1981
- 1981-02-09 FR FR8102513A patent/FR2499748B1/fr not_active Expired
Also Published As
Publication number | Publication date |
---|---|
FR2499748A1 (fr) | 1982-08-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
CA | Change of address | ||
CD | Change of name or company name | ||
CD | Change of name or company name | ||
ST | Notification of lapse |