FR2466103A1 - Procede de realisation d'un reseau d'interconnexion de composants electroniques a conducteurs en aluminium et isolant en alumine et reseau d'interconnexion obtenu par ce procede - Google Patents

Procede de realisation d'un reseau d'interconnexion de composants electroniques a conducteurs en aluminium et isolant en alumine et reseau d'interconnexion obtenu par ce procede Download PDF

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Publication number
FR2466103A1
FR2466103A1 FR7923204A FR7923204A FR2466103A1 FR 2466103 A1 FR2466103 A1 FR 2466103A1 FR 7923204 A FR7923204 A FR 7923204A FR 7923204 A FR7923204 A FR 7923204A FR 2466103 A1 FR2466103 A1 FR 2466103A1
Authority
FR
France
Prior art keywords
aluminum
layer
interconnection
alumina
network
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7923204A
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English (en)
French (fr)
Other versions
FR2466103B1 (https=
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
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Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to FR7923204A priority Critical patent/FR2466103A1/fr
Publication of FR2466103A1 publication Critical patent/FR2466103A1/fr
Application granted granted Critical
Publication of FR2466103B1 publication Critical patent/FR2466103B1/fr
Granted legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/467—Adding a circuit layer by thin film methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/6875—Shapes or dispositions thereof being on a metallic substrate, e.g. insulated metal substrates [IMS]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/053—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
FR7923204A 1979-09-18 1979-09-18 Procede de realisation d'un reseau d'interconnexion de composants electroniques a conducteurs en aluminium et isolant en alumine et reseau d'interconnexion obtenu par ce procede Granted FR2466103A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7923204A FR2466103A1 (fr) 1979-09-18 1979-09-18 Procede de realisation d'un reseau d'interconnexion de composants electroniques a conducteurs en aluminium et isolant en alumine et reseau d'interconnexion obtenu par ce procede

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7923204A FR2466103A1 (fr) 1979-09-18 1979-09-18 Procede de realisation d'un reseau d'interconnexion de composants electroniques a conducteurs en aluminium et isolant en alumine et reseau d'interconnexion obtenu par ce procede

Publications (2)

Publication Number Publication Date
FR2466103A1 true FR2466103A1 (fr) 1981-03-27
FR2466103B1 FR2466103B1 (https=) 1983-07-18

Family

ID=9229735

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7923204A Granted FR2466103A1 (fr) 1979-09-18 1979-09-18 Procede de realisation d'un reseau d'interconnexion de composants electroniques a conducteurs en aluminium et isolant en alumine et reseau d'interconnexion obtenu par ce procede

Country Status (1)

Country Link
FR (1) FR2466103A1 (https=)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2545313A1 (fr) * 1983-04-29 1984-11-02 Bbc Brown Boveri & Cie Procede pour fabriquer un circuit a plusieurs couches par stratification et metallisation
FR2557755A1 (fr) * 1983-12-28 1985-07-05 Nec Corp Substrat de cablage multi-couche
EP0170477A3 (en) * 1984-08-01 1987-02-04 Peter Leslie Moran Multilayer systems and their method of production
WO1995008841A1 (en) * 1993-09-20 1995-03-30 Labunov Vladimir A Process for making multilevel interconnections of electronic components
WO1996003771A1 (en) * 1994-07-25 1996-02-08 Micro Components & Systems Ltd. Method of manufacturing a composite structure for use in electronic devices and structure, manufactured by said method
WO1998053499A1 (en) * 1997-05-20 1998-11-26 Micro Components Ltd. Substrate for electronic packaging, pin jig fixture
WO2000031797A3 (en) * 1998-11-25 2000-11-23 Micro Components Ltd Device for electronic packaging, pin jig fixture
NL1033519C2 (nl) * 2007-03-08 2008-09-16 Yun Tai Werkwijze voor warmteoverdracht bij halfgeleiders.
WO2016190737A3 (en) * 2015-05-26 2017-02-09 Metalmembranes.Com B.V. Method to produce electrically isolated or insulated areas in a metal, and a product comprising such area

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3827949A (en) * 1972-03-29 1974-08-06 Ibm Anodic oxide passivated planar aluminum metallurgy system and method of producing
FR2220879A1 (https=) * 1973-03-10 1974-10-04 Tokyo Shibaura Electric Co
US4015987A (en) * 1975-08-13 1977-04-05 The United States Of America As Represented By The Secretary Of The Navy Process for making chip carriers using anodized aluminum

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3827949A (en) * 1972-03-29 1974-08-06 Ibm Anodic oxide passivated planar aluminum metallurgy system and method of producing
FR2220879A1 (https=) * 1973-03-10 1974-10-04 Tokyo Shibaura Electric Co
US4015987A (en) * 1975-08-13 1977-04-05 The United States Of America As Represented By The Secretary Of The Navy Process for making chip carriers using anodized aluminum

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2545313A1 (fr) * 1983-04-29 1984-11-02 Bbc Brown Boveri & Cie Procede pour fabriquer un circuit a plusieurs couches par stratification et metallisation
FR2557755A1 (fr) * 1983-12-28 1985-07-05 Nec Corp Substrat de cablage multi-couche
EP0170477A3 (en) * 1984-08-01 1987-02-04 Peter Leslie Moran Multilayer systems and their method of production
WO1995008841A1 (en) * 1993-09-20 1995-03-30 Labunov Vladimir A Process for making multilevel interconnections of electronic components
WO1996003771A1 (en) * 1994-07-25 1996-02-08 Micro Components & Systems Ltd. Method of manufacturing a composite structure for use in electronic devices and structure, manufactured by said method
US5661341A (en) * 1994-07-25 1997-08-26 Microcomponents And Systems Ltd. Method of manufacturing a composite structure for use in electronic devices and structure, manufactured by said method
WO1998053499A1 (en) * 1997-05-20 1998-11-26 Micro Components Ltd. Substrate for electronic packaging, pin jig fixture
US6448510B1 (en) 1997-05-20 2002-09-10 Micro Components Ltd. Substrate for electronic packaging, pin jig fixture
WO2000031797A3 (en) * 1998-11-25 2000-11-23 Micro Components Ltd Device for electronic packaging, pin jig fixture
NL1033519C2 (nl) * 2007-03-08 2008-09-16 Yun Tai Werkwijze voor warmteoverdracht bij halfgeleiders.
WO2016190737A3 (en) * 2015-05-26 2017-02-09 Metalmembranes.Com B.V. Method to produce electrically isolated or insulated areas in a metal, and a product comprising such area
CN107923061A (zh) * 2015-05-26 2018-04-17 金属膜克姆有限公司 在金属中产生电隔离或绝缘区域的方法以及包括这种区域的产品

Also Published As

Publication number Publication date
FR2466103B1 (https=) 1983-07-18

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