FR2445621A1 - Procede de fabrication d'un dispositif par attaque par plasma, avec diminution de l'effet de charge - Google Patents

Procede de fabrication d'un dispositif par attaque par plasma, avec diminution de l'effet de charge

Info

Publication number
FR2445621A1
FR2445621A1 FR7919156A FR7919156A FR2445621A1 FR 2445621 A1 FR2445621 A1 FR 2445621A1 FR 7919156 A FR7919156 A FR 7919156A FR 7919156 A FR7919156 A FR 7919156A FR 2445621 A1 FR2445621 A1 FR 2445621A1
Authority
FR
France
Prior art keywords
attack
plasma
reduction
manufacturing
load effect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7919156A
Other languages
English (en)
Other versions
FR2445621B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of FR2445621A1 publication Critical patent/FR2445621A1/fr
Application granted granted Critical
Publication of FR2445621B1 publication Critical patent/FR2445621B1/fr
Expired legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23FNON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F4/00Processes for removing metallic material from surfaces, not provided for in group C23F1/00 or C23F3/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/941Loading effect mitigation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Plasma & Fusion (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • ing And Chemical Polishing (AREA)

Abstract

L'invention concerne les techniques de lithographie par attaque par plasma. L'invention a pour but de réduire l'effet de charge qui se manifeste dans l'attaque par plasma, et qui consiste en une variation de la vitesse d'attaque en fonction de la charge du dispositif utilisé, c'est-à-dire de la surface totale à attaquer. La courbe 12 qui présente un effet de charge important est caractéristique des procédés de l'art anterieur, tandis que les courbes 10 et 11 qui correspondent à l'invention, manifestent un effet de charge beaucoup plus faible. Cette amélioration résulte d'un choix approprié de la durée de vie de la substance d'attaque dans le plasma, indépendamment de la réaction d'attaque. Application à la fabrication des circuits intégrés complexes.
FR7919156A 1978-07-31 1979-07-25 Procede de fabrication d'un dispositif par attaque par plasma, avec diminution de l'effet de charge Expired FR2445621B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/929,568 US4226665A (en) 1978-07-31 1978-07-31 Device fabrication by plasma etching

Publications (2)

Publication Number Publication Date
FR2445621A1 true FR2445621A1 (fr) 1980-07-25
FR2445621B1 FR2445621B1 (fr) 1986-10-03

Family

ID=25458066

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7919156A Expired FR2445621B1 (fr) 1978-07-31 1979-07-25 Procede de fabrication d'un dispositif par attaque par plasma, avec diminution de l'effet de charge

Country Status (14)

Country Link
US (1) US4226665A (fr)
JP (1) JPS5521595A (fr)
AU (1) AU524556B2 (fr)
BE (1) BE877893A (fr)
CA (1) CA1124207A (fr)
DE (1) DE2930292A1 (fr)
ES (1) ES482960A1 (fr)
FR (1) FR2445621B1 (fr)
GB (1) GB2026395B (fr)
IE (1) IE48606B1 (fr)
IL (1) IL57888A (fr)
IT (1) IT1193492B (fr)
NL (1) NL7905868A (fr)
SE (1) SE442358B (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2478421A1 (fr) * 1980-02-06 1981-09-18 Western Electric Co Procede de fabrication de dispositifs microminiatures par attaque reactive du silicium avec bombardement

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56100422A (en) * 1980-01-17 1981-08-12 Toshiba Corp Plasma etching method
JPS56134738A (en) * 1980-03-26 1981-10-21 Toshiba Corp Method of forming pattern
US4310380A (en) * 1980-04-07 1982-01-12 Bell Telephone Laboratories, Incorporated Plasma etching of silicon
NL8004005A (nl) * 1980-07-11 1982-02-01 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
US4344816A (en) * 1980-12-19 1982-08-17 Bell Telephone Laboratories, Incorporated Selectively etched bodies
EP0099558A3 (fr) * 1982-07-22 1985-07-31 Texas Instruments Incorporated Décapage du plasma rapide d'aluminium
US4426246A (en) * 1982-07-26 1984-01-17 Bell Telephone Laboratories, Incorporated Plasma pretreatment with BCl3 to remove passivation formed by fluorine-etch
NL8204437A (nl) * 1982-11-16 1984-06-18 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting met behulp van plasma-etsen.
US4414057A (en) * 1982-12-03 1983-11-08 Inmos Corporation Anisotropic silicide etching process
US4778562A (en) * 1984-08-13 1988-10-18 General Motors Corporation Reactive ion etching of tin oxide films using neutral reactant gas containing hydrogen
US4544444A (en) * 1984-08-15 1985-10-01 General Motors Corporation Reactive ion etching of tin oxide films using silicon tetrachloride reactant gas
GB2171360A (en) * 1985-02-19 1986-08-28 Oerlikon Buehrle Inc Etching aluminum/copper alloy films
EP0203560A1 (fr) * 1985-05-31 1986-12-03 Tegal Corporation Gravure de tranchées à l'aide de plasma
DE3613181C2 (de) * 1986-04-18 1995-09-07 Siemens Ag Verfahren zum Erzeugen von Gräben mit einstellbarer Steilheit der Grabenwände in aus Silizium bestehenden Halbleitersubstraten
EP0246514A3 (fr) * 1986-05-16 1989-09-20 Air Products And Chemicals, Inc. Gravure de sillons profonds dans du silicium monocristallin
US4917586A (en) * 1987-02-25 1990-04-17 Adir Jacob Process for dry sterilization of medical devices and materials
US5087418A (en) * 1987-02-25 1992-02-11 Adir Jacob Process for dry sterilization of medical devices and materials
US5171525A (en) * 1987-02-25 1992-12-15 Adir Jacob Process and apparatus for dry sterilization of medical devices and materials
US4818488A (en) * 1987-02-25 1989-04-04 Adir Jacob Process and apparatus for dry sterilization of medical devices and materials
US4976920A (en) * 1987-07-14 1990-12-11 Adir Jacob Process for dry sterilization of medical devices and materials
US4801427A (en) * 1987-02-25 1989-01-31 Adir Jacob Process and apparatus for dry sterilization of medical devices and materials
US5200158A (en) * 1987-02-25 1993-04-06 Adir Jacob Process and apparatus for dry sterilization of medical devices and materials
US4931261A (en) * 1987-02-25 1990-06-05 Adir Jacob Apparatus for dry sterilization of medical devices and materials
US4943417A (en) * 1987-02-25 1990-07-24 Adir Jacob Apparatus for dry sterilization of medical devices and materials
EP0295581A1 (fr) * 1987-06-19 1988-12-21 Tegal Corporation Procédé de décapage d'aluminium dans un plasma
US4981551A (en) * 1987-11-03 1991-01-01 North Carolina State University Dry etching of silicon carbide
US4946547A (en) * 1989-10-13 1990-08-07 Cree Research, Inc. Method of preparing silicon carbide surfaces for crystal growth
JP3092185B2 (ja) * 1990-07-30 2000-09-25 セイコーエプソン株式会社 半導体装置の製造方法
US5217567A (en) * 1992-02-27 1993-06-08 International Business Machines Corporation Selective etching process for boron nitride films
JP2734915B2 (ja) * 1992-11-18 1998-04-02 株式会社デンソー 半導体のドライエッチング方法
JP2884970B2 (ja) * 1992-11-18 1999-04-19 株式会社デンソー 半導体のドライエッチング方法
JP3370806B2 (ja) 1994-11-25 2003-01-27 株式会社半導体エネルギー研究所 Mis型半導体装置の作製方法
US5711849A (en) * 1995-05-03 1998-01-27 Daniel L. Flamm Process optimization in gas phase dry etching
KR100528569B1 (ko) 1997-09-24 2005-11-15 인피니언 테크놀로지스 아게 실리콘 기판에 트렌치 구조물을 형성하는 방법
US6399507B1 (en) 1999-09-22 2002-06-04 Applied Materials, Inc. Stable plasma process for etching of films
US20050029226A1 (en) * 2003-08-07 2005-02-10 Advanced Power Technology, Inc. Plasma etching using dibromomethane addition
US8649123B1 (en) 2008-11-26 2014-02-11 Western Digital (Fremont), Llc Method to eliminate reactive ion etching (RIE) loading effects for damascene perpendicular magnetic recording (PMR) fabrication
US8257597B1 (en) 2010-03-03 2012-09-04 Western Digital (Fremont), Llc Double rie damascene process for nose length control
JP5537324B2 (ja) * 2010-08-05 2014-07-02 株式会社東芝 半導体装置の製造方法
JP7304557B2 (ja) * 2019-07-16 2023-07-07 パナソニックIpマネジメント株式会社 プラズマエッチング方法および素子チップの製造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1417085A (en) * 1973-05-17 1975-12-10 Standard Telephones Cables Ltd Plasma etching
US3994793A (en) * 1975-05-22 1976-11-30 International Business Machines Corporation Reactive ion etching of aluminum
US4069096A (en) * 1975-11-03 1978-01-17 Texas Instruments Incorporated Silicon etching process
DE2716592C3 (de) * 1976-04-15 1979-11-08 Hitachi, Ltd., Tokio Plasma-Ätzvorrichtung
CA1059882A (fr) * 1976-08-16 1979-08-07 Northern Telecom Limited Burinage de l'aluminium et de l'alumine au plasma gazeux
US4030967A (en) * 1976-08-16 1977-06-21 Northern Telecom Limited Gaseous plasma etching of aluminum and aluminum oxide

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2478421A1 (fr) * 1980-02-06 1981-09-18 Western Electric Co Procede de fabrication de dispositifs microminiatures par attaque reactive du silicium avec bombardement

Also Published As

Publication number Publication date
AU524556B2 (en) 1982-09-23
GB2026395B (en) 1982-07-14
IT1193492B (it) 1988-07-08
DE2930292C2 (fr) 1988-01-21
CA1124207A (fr) 1982-05-25
GB2026395A (en) 1980-02-06
IL57888A (en) 1981-10-30
SE7906299L (sv) 1980-02-01
IT7924775A0 (it) 1979-07-30
NL7905868A (nl) 1980-02-04
JPS5521595A (en) 1980-02-15
IE48606B1 (en) 1985-03-20
IL57888A0 (en) 1979-11-30
AU4923779A (en) 1980-02-07
JPS5711954B2 (fr) 1982-03-08
BE877893A (fr) 1979-11-16
SE442358B (sv) 1985-12-16
ES482960A1 (es) 1980-03-01
DE2930292A1 (de) 1980-02-28
IE791448L (en) 1980-01-31
FR2445621B1 (fr) 1986-10-03
US4226665A (en) 1980-10-07

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