FR2427646A1 - Procede pour modifier l'execution d'un programme ecrit dans une memoire morte, et appareillage pour la mise en oeuvre de ce procede - Google Patents

Procede pour modifier l'execution d'un programme ecrit dans une memoire morte, et appareillage pour la mise en oeuvre de ce procede

Info

Publication number
FR2427646A1
FR2427646A1 FR7815946A FR7815946A FR2427646A1 FR 2427646 A1 FR2427646 A1 FR 2427646A1 FR 7815946 A FR7815946 A FR 7815946A FR 7815946 A FR7815946 A FR 7815946A FR 2427646 A1 FR2427646 A1 FR 2427646A1
Authority
FR
France
Prior art keywords
memory
logic
correction memory
passive
correction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7815946A
Other languages
English (en)
Other versions
FR2427646B3 (fr
Inventor
Ioan Muntean
Henri Gilles Rouquairol
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RMS INGENIERIE FINANCIERE
Original Assignee
RMS INGENIERIE FINANCIERE
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RMS INGENIERIE FINANCIERE filed Critical RMS INGENIERIE FINANCIERE
Priority to FR7815946A priority Critical patent/FR2427646A1/fr
Publication of FR2427646A1 publication Critical patent/FR2427646A1/fr
Application granted granted Critical
Publication of FR2427646B3 publication Critical patent/FR2427646B3/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/328—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for runtime instruction patching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0638—Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262—Arrangements for next microinstruction selection
    • G06F9/268—Microinstruction selection not based on processing results, e.g. interrupt, patch, first cycle store, diagnostic programs

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)

Abstract

Procédé pour modifier l'exécution d'une partie d'un programme écrit dans une mémoire morte, notamment faisant partie d'un système à microprocesseur. On établit une mémoire complémentaire comportant la partie modifiée et on lit ladite mémoire complémentaire en lieu et place de la partie à modifier de la mémoire morte. Cette dernière est divisée en pages logiques dont chacune est plus petite que la capacité maximale de la mémoire complémentaire. Applications aux mémoires mortes de microprocesseurs.
FR7815946A 1978-05-29 1978-05-29 Procede pour modifier l'execution d'un programme ecrit dans une memoire morte, et appareillage pour la mise en oeuvre de ce procede Granted FR2427646A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7815946A FR2427646A1 (fr) 1978-05-29 1978-05-29 Procede pour modifier l'execution d'un programme ecrit dans une memoire morte, et appareillage pour la mise en oeuvre de ce procede

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7815946A FR2427646A1 (fr) 1978-05-29 1978-05-29 Procede pour modifier l'execution d'un programme ecrit dans une memoire morte, et appareillage pour la mise en oeuvre de ce procede

Publications (2)

Publication Number Publication Date
FR2427646A1 true FR2427646A1 (fr) 1979-12-28
FR2427646B3 FR2427646B3 (fr) 1981-01-02

Family

ID=9208796

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7815946A Granted FR2427646A1 (fr) 1978-05-29 1978-05-29 Procede pour modifier l'execution d'un programme ecrit dans une memoire morte, et appareillage pour la mise en oeuvre de ce procede

Country Status (1)

Country Link
FR (1) FR2427646A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0049353A1 (fr) * 1980-10-06 1982-04-14 Texas Instruments Incorporated Dispositif de mémoire semiconducteur pour système à microprocesseur
WO1985003150A1 (fr) * 1984-01-03 1985-07-18 Ncr Corporation Systeme de traitement de donnees comprenant une hierarchie de la memoire
EP0163775A1 (fr) * 1984-05-25 1985-12-11 Robert Bosch Gmbh Dispositif de commande de programme pour un véhicule à moteur
AU569390B2 (en) * 1984-05-25 1988-01-28 Robert Bosch Gmbh Control device for motor vehicle

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0049353A1 (fr) * 1980-10-06 1982-04-14 Texas Instruments Incorporated Dispositif de mémoire semiconducteur pour système à microprocesseur
WO1985003150A1 (fr) * 1984-01-03 1985-07-18 Ncr Corporation Systeme de traitement de donnees comprenant une hierarchie de la memoire
EP0163775A1 (fr) * 1984-05-25 1985-12-11 Robert Bosch Gmbh Dispositif de commande de programme pour un véhicule à moteur
AU569390B2 (en) * 1984-05-25 1988-01-28 Robert Bosch Gmbh Control device for motor vehicle
US4908792A (en) * 1984-05-25 1990-03-13 Robert Bosch Gmbh Control system to control operation of an apparatus, more particularly operation of an automotive vehicle

Also Published As

Publication number Publication date
FR2427646B3 (fr) 1981-01-02

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Legal Events

Date Code Title Description
ST Notification of lapse