JPS558615A - Refresh control system - Google Patents

Refresh control system

Info

Publication number
JPS558615A
JPS558615A JP7913878A JP7913878A JPS558615A JP S558615 A JPS558615 A JP S558615A JP 7913878 A JP7913878 A JP 7913878A JP 7913878 A JP7913878 A JP 7913878A JP S558615 A JPS558615 A JP S558615A
Authority
JP
Japan
Prior art keywords
address
refresh
processing unit
dynamic ram
efficiency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7913878A
Other languages
Japanese (ja)
Inventor
Kan Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP7913878A priority Critical patent/JPS558615A/en
Publication of JPS558615A publication Critical patent/JPS558615A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:To improve the efficiency of a data processing unit by stopping refresh of the next cycle in case that the address of a dynamic RAM where data has been just read or written is included in the next refreshed address group. CONSTITUTION:This system purposes improving the use efficiency of a dynamic RAM to improve the efficiency of a data processing unit as the whole and is provided with dynamic RAM 1 which is accessed by central processing unit 2, a refresh address unit which generates a refresh address on a basis of the output of a refresh request signal generator, and coincidence circuit 9. Then, when central processing unit 2 accesses dynamic RAM 1, coincidence circuit 9 compares the address of RAM 1 and the refresh request address with each other and generates a coincidence signal to stop temporarily the generation of refresh request signals in case of agreement of them.
JP7913878A 1978-06-29 1978-06-29 Refresh control system Pending JPS558615A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7913878A JPS558615A (en) 1978-06-29 1978-06-29 Refresh control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7913878A JPS558615A (en) 1978-06-29 1978-06-29 Refresh control system

Publications (1)

Publication Number Publication Date
JPS558615A true JPS558615A (en) 1980-01-22

Family

ID=13681589

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7913878A Pending JPS558615A (en) 1978-06-29 1978-06-29 Refresh control system

Country Status (1)

Country Link
JP (1) JPS558615A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6089892A (en) * 1983-10-21 1985-05-20 Toshiba Corp Refresh controller of dynamic memory
JPS6297943A (en) * 1985-10-18 1987-05-07 帝人株式会社 Weaving method in water jet loom
KR200458194Y1 (en) * 2009-12-24 2012-01-30 주식회사 케이씨텍 Susceptor for clamping wafer and atomic layer deposition apparatus having the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6089892A (en) * 1983-10-21 1985-05-20 Toshiba Corp Refresh controller of dynamic memory
JPS6297943A (en) * 1985-10-18 1987-05-07 帝人株式会社 Weaving method in water jet loom
KR200458194Y1 (en) * 2009-12-24 2012-01-30 주식회사 케이씨텍 Susceptor for clamping wafer and atomic layer deposition apparatus having the same

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