FR2423006A1 - - Google Patents
Info
- Publication number
- FR2423006A1 FR2423006A1 FR7908959A FR7908959A FR2423006A1 FR 2423006 A1 FR2423006 A1 FR 2423006A1 FR 7908959 A FR7908959 A FR 7908959A FR 7908959 A FR7908959 A FR 7908959A FR 2423006 A1 FR2423006 A1 FR 2423006A1
- Authority
- FR
- France
- Prior art keywords
- firmware
- instruction set
- processing unit
- microcode
- central processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
- G06F9/262—Arrangements for next microinstruction selection
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/18—Packaging or power distribution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/18—Packaging or power distribution
- G06F1/181—Enclosures
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/20—Cooling means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
- G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/14—Mounting supporting structure in casing or on frame or rack
- H05K7/1422—Printed circuit boards receptacles, e.g. stacked structures, electronic circuit modules or box like frames
- H05K7/1424—Card cages
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Power Engineering (AREA)
- Software Systems (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Cooling Or The Like Of Electrical Apparatus (AREA)
- Executing Machine-Instructions (AREA)
- Bus Control (AREA)
Abstract
L'invention a trait à une unité centrale de traitement à même d'exécuter le jeu d'instructions universel. Le jeu d'instructions établit les spécifications fonctionnelles pour l'unité centrale de traitement Les particularité principales du matériel sont l'utilisation d'un seul bus principal pour les données et les instructions, les transferts vers le bus principal et depuis celui-ci sont effectués sous la commande d'un microprogramme codé, et le placement des éléments logiques arithmétiques binaires à virgule fixe, ainsi que des registres banalisés associés, sur un seul poupe en cascade de bus de circuits intégrés à grande échelle qui fonctionnent sous la commande du microcode. La mémoire de microcode est adressée par un dispositif de commande à microprogramme qui comprend une mémoire pile à compteur de commande et une mémoire pile à adresse de retour permettant d'utiliser plusieurs niveaux de sous-programmes du microprogramme. Les dispositifs semi-conducteurs sont montés sur des cartes multicouches fournissant des lignes de transmission à capacité répartie dans deux plans en vue d'un fonctionnement plus rapide et d'une suppression des bruits. Des dispositifs émetteurs et récepteurs tri-états isolent les bus de transport de l'information qui ne sont pas utilisés pour l'exécution de la micro-instruction adressée. Application : traitement de l'information.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US89492578A | 1978-04-10 | 1978-04-10 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2423006A1 true FR2423006A1 (fr) | 1979-11-09 |
FR2423006B1 FR2423006B1 (fr) | 1988-06-10 |
Family
ID=25403688
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7908958A Granted FR2422999A3 (fr) | 1978-04-10 | 1979-04-09 | Dispositif de traitement de donnees |
FR7908959A Expired FR2423006B1 (fr) | 1978-04-10 | 1979-04-09 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7908958A Granted FR2422999A3 (fr) | 1978-04-10 | 1979-04-09 | Dispositif de traitement de donnees |
Country Status (4)
Country | Link |
---|---|
JP (2) | JPS553357U (fr) |
DE (2) | DE2913492A1 (fr) |
FR (2) | FR2422999A3 (fr) |
GB (2) | GB2019062B (fr) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1992017847A1 (fr) * | 1991-03-27 | 1992-10-15 | Institut Tochnoi Mekhaniki I Vychislitelnoi Tekhniki Imeni S.A.Lebedeva Akademii Nauk Sssr | Processeur central |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5616082Y2 (fr) * | 1979-06-01 | 1981-04-15 | ||
CH639517A5 (en) * | 1980-10-31 | 1983-11-15 | Appelsa Applic Electr Sa | Cooling device for an installation containing electronic equipment |
JPS58501295A (ja) * | 1981-08-14 | 1983-08-04 | ヘイステイングス,オ−テイス エイチ. | 改良されたデ−タ処理装置囲い体 |
DE3136226C2 (de) * | 1981-09-12 | 1991-02-14 | Ing. Rolf Seifert electronic GmbH, 5828 Ennepetal | Klimagerät |
DE3321321A1 (de) * | 1982-06-19 | 1983-12-22 | Ferranti plc, Gatley, Cheadle, Cheshire | Elektrische schaltungsanordnung |
US4488193A (en) * | 1983-03-30 | 1984-12-11 | International Business Machines Corporation | Closed loop cooling system for disk file with heat exchanger integral with baseplate |
GB2145290A (en) * | 1983-08-10 | 1985-03-20 | Smiths Industries Plc | Cooling avionics circuit modules |
US4831476A (en) * | 1985-07-15 | 1989-05-16 | Allen-Bradley Company | Disc drive isolation system |
US4685303A (en) * | 1985-07-15 | 1987-08-11 | Allen-Bradley Company, Inc. | Disc drive isolation system |
DE4413130C2 (de) * | 1994-04-19 | 1997-12-18 | Loh Kg Rittal Werk | Kühlgerät |
DE19837705C2 (de) * | 1998-08-20 | 2003-04-17 | Rittal Gmbh & Co Kg | Informationsterminal |
DE19912029C2 (de) * | 1999-03-17 | 2003-12-04 | Rittal Gmbh & Co Kg | Kühlgerät |
DE19914408B4 (de) * | 1999-03-30 | 2006-07-13 | Deutsche Telekom Ag | Geräteschrank |
EP1158389A3 (fr) * | 2000-05-25 | 2002-11-13 | Kioan Cheon | Ordinateur possédant un dispositif de refroidissement et échangeur de chaleur de ce dispositif de refroidissement |
DE10051092A1 (de) * | 2000-10-14 | 2002-04-25 | Zahnradfabrik Friedrichshafen | Elektrisches Antriebssystem |
JP2004281789A (ja) * | 2003-03-17 | 2004-10-07 | Ntt Power & Building Facilities Inc | 大型装置対応ラック |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3447037A (en) * | 1966-07-25 | 1969-05-27 | Bunker Ramo | Digital data equipment packaging organization |
US3825904A (en) * | 1973-06-08 | 1974-07-23 | Ibm | Virtual memory system |
US4057848A (en) * | 1974-06-13 | 1977-11-08 | Hitachi, Ltd. | Address translation system |
US4068303A (en) * | 1975-03-24 | 1978-01-10 | Hitachi, Ltd. | Address translation managing system with translation pair purging |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5069946A (fr) * | 1973-10-24 | 1975-06-11 | ||
JPS5529515B2 (fr) * | 1974-12-11 | 1980-08-04 |
-
1979
- 1979-04-04 DE DE19792913492 patent/DE2913492A1/de not_active Ceased
- 1979-04-04 DE DE7909731U patent/DE7909731U1/de not_active Expired
- 1979-04-06 GB GB7912236A patent/GB2019062B/en not_active Expired
- 1979-04-06 GB GB7912237A patent/GB2025144B/en not_active Expired
- 1979-04-09 FR FR7908958A patent/FR2422999A3/fr active Granted
- 1979-04-09 FR FR7908959A patent/FR2423006B1/fr not_active Expired
- 1979-04-09 JP JP1979045754U patent/JPS553357U/ja active Pending
- 1979-04-10 JP JP4337979A patent/JPS54161241A/ja active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3447037A (en) * | 1966-07-25 | 1969-05-27 | Bunker Ramo | Digital data equipment packaging organization |
US3825904A (en) * | 1973-06-08 | 1974-07-23 | Ibm | Virtual memory system |
US4057848A (en) * | 1974-06-13 | 1977-11-08 | Hitachi, Ltd. | Address translation system |
US4068303A (en) * | 1975-03-24 | 1978-01-10 | Hitachi, Ltd. | Address translation managing system with translation pair purging |
Non-Patent Citations (4)
Title |
---|
EDN, 20 janvier 1978, DENVER (US) * |
ELECTRONIC DESIGN, vol. 25, no. 12, 7 juin 1977, ROCHELLE PARK (US) * |
ELECTRONICS, vol. 49, no. 20, 30 septembre 1976, NEW YORK (US) * |
ELECTRONICS, vol. 49, no. 24, 25 novembre 1976, NEW YORK (US) * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1992017847A1 (fr) * | 1991-03-27 | 1992-10-15 | Institut Tochnoi Mekhaniki I Vychislitelnoi Tekhniki Imeni S.A.Lebedeva Akademii Nauk Sssr | Processeur central |
US5418975A (en) * | 1991-03-27 | 1995-05-23 | Institut Tochnoi Mekhaniki I Vychislitelnoi Tekhniki Imeni S.A. Lebedeva Akademii Nauk Sssr | Wide instruction word architecture central processor |
Also Published As
Publication number | Publication date |
---|---|
GB2025144B (en) | 1982-07-07 |
GB2025144A (en) | 1980-01-16 |
DE7909731U1 (de) | 1979-09-13 |
JPS54161241A (en) | 1979-12-20 |
GB2019062A (en) | 1979-10-24 |
FR2422999A3 (fr) | 1979-11-09 |
FR2423006B1 (fr) | 1988-06-10 |
JPS553357U (fr) | 1980-01-10 |
DE2913492A1 (de) | 1979-10-18 |
GB2019062B (en) | 1982-07-28 |
FR2422999B3 (fr) | 1981-01-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |