FR2422205A1 - Operateur de calcul universel microprogrammable - Google Patents

Operateur de calcul universel microprogrammable

Info

Publication number
FR2422205A1
FR2422205A1 FR7810052A FR7810052A FR2422205A1 FR 2422205 A1 FR2422205 A1 FR 2422205A1 FR 7810052 A FR7810052 A FR 7810052A FR 7810052 A FR7810052 A FR 7810052A FR 2422205 A1 FR2422205 A1 FR 2422205A1
Authority
FR
France
Prior art keywords
memory
sequence controller
machine tool
arithmetic logic
logic unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7810052A
Other languages
English (en)
Other versions
FR2422205B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renault SAS
Original Assignee
Renault SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renault SAS filed Critical Renault SAS
Priority to FR7810052A priority Critical patent/FR2422205A1/fr
Publication of FR2422205A1 publication Critical patent/FR2422205A1/fr
Application granted granted Critical
Publication of FR2422205B1 publication Critical patent/FR2422205B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Programmable Controllers (AREA)

Abstract

L'opérateur de calcul universel comprend : un coupleur d'entrées/sorties 10, une mémoire vive 32, une unité arithmétique et logique 16, une unité de commande 38 réduite à un contrôleur de séquence 18, une mémoire de microprogramme 37, un registre de micro-instructions 19, une unité de contrôle des conditions 22, un bus de données 31, un bus d'adresses 35 transmettant les adresses du registre de micro-instructions 19 à la mémoire vive 32 et au coupleur entrées/sorties 10. Il permet de faire des calculs, si complexes soient-ils, à une vitesse au moins égaie à celle du minicalculateur auquel il est associé par le bus 29 et en parallèle avec celui-ci.
FR7810052A 1978-04-05 1978-04-05 Operateur de calcul universel microprogrammable Granted FR2422205A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7810052A FR2422205A1 (fr) 1978-04-05 1978-04-05 Operateur de calcul universel microprogrammable

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7810052A FR2422205A1 (fr) 1978-04-05 1978-04-05 Operateur de calcul universel microprogrammable

Publications (2)

Publication Number Publication Date
FR2422205A1 true FR2422205A1 (fr) 1979-11-02
FR2422205B1 FR2422205B1 (fr) 1981-07-24

Family

ID=9206705

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7810052A Granted FR2422205A1 (fr) 1978-04-05 1978-04-05 Operateur de calcul universel microprogrammable

Country Status (1)

Country Link
FR (1) FR2422205A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0021365A2 (fr) * 1979-06-26 1981-01-07 Kabushiki Kaisha Toshiba Système de traitement de données avec calculateur auxiliaire
EP0261685A2 (fr) * 1986-09-24 1988-03-30 Hitachi, Ltd. Système microprocesseur

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
NV8032/77 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0021365A2 (fr) * 1979-06-26 1981-01-07 Kabushiki Kaisha Toshiba Système de traitement de données avec calculateur auxiliaire
EP0021365A3 (en) * 1979-06-26 1981-08-05 Tokyo Shibaura Denki Kabushiki Kaisha Data processing system with a slave computer
EP0261685A2 (fr) * 1986-09-24 1988-03-30 Hitachi, Ltd. Système microprocesseur
EP0261685A3 (fr) * 1986-09-24 1991-04-24 Hitachi, Ltd. Système microprocesseur

Also Published As

Publication number Publication date
FR2422205B1 (fr) 1981-07-24

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Legal Events

Date Code Title Description
ST Notification of lapse