FR2382745A1 - MEMORY CELL - Google Patents

MEMORY CELL

Info

Publication number
FR2382745A1
FR2382745A1 FR7817176A FR7817176A FR2382745A1 FR 2382745 A1 FR2382745 A1 FR 2382745A1 FR 7817176 A FR7817176 A FR 7817176A FR 7817176 A FR7817176 A FR 7817176A FR 2382745 A1 FR2382745 A1 FR 2382745A1
Authority
FR
France
Prior art keywords
memory cell
substrate
manufacture
provision
isolated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7817176A
Other languages
French (fr)
Other versions
FR2382745B1 (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CTU of Delaware Inc
Original Assignee
Mostek Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mostek Corp filed Critical Mostek Corp
Publication of FR2382745A1 publication Critical patent/FR2382745A1/en
Application granted granted Critical
Publication of FR2382745B1 publication Critical patent/FR2382745B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/35—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices with charge storage in a depletion layer, e.g. charge coupled devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Semiconductor Memories (AREA)
  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Weting (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Non-Volatile Memory (AREA)

Abstract

La présente invention concerne un procédé de fabrication de dispositif à semiconducteur. Selon ce procédé, on prévoit en cours de fabrication, la formation de couches de silicium polycristallin de recouvrement qui sont disposées au-dessus de portions sélectionnées d'un substrat semiconducteur 12 et isolées du substrat ainsi que l'une de l'autre. Application notamment à la fabrication de mémoires à accès aléatoire.The present invention relates to a method of manufacturing a semiconductor device. According to this method, during manufacture, provision is made for the formation of polycrystalline silicon covering layers which are arranged above selected portions of a semiconductor substrate 12 and isolated from the substrate as well as from one another. Application in particular to the manufacture of random access memories.

FR7817176A 1977-01-26 1978-06-08 MEMORY CELL Granted FR2382745A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US76239877A 1977-01-26 1977-01-26

Publications (2)

Publication Number Publication Date
FR2382745A1 true FR2382745A1 (en) 1978-09-29
FR2382745B1 FR2382745B1 (en) 1983-06-03

Family

ID=25064929

Family Applications (5)

Application Number Title Priority Date Filing Date
FR7802068A Granted FR2382768A1 (en) 1977-01-26 1978-01-25 METHOD FOR PREPARING A SUBSTRATE SURFACE OF AN ISOPLANAR SEMICONDUCTOR DEVICE
FR7817175A Granted FR2382770A1 (en) 1977-01-26 1978-06-08 PROCESS FOR FORMING VERY SMALL CONTACT OPENINGS IN AN INTEGRATED CIRCUIT DEVICE
FR7817176A Granted FR2382745A1 (en) 1977-01-26 1978-06-08 MEMORY CELL
FR7817173A Granted FR2382769A1 (en) 1977-01-26 1978-06-08 METHOD FOR MANUFACTURING HIGH DEFINITION POLYCRYSTALLINE SILICON LAYERS
FR7817174A Granted FR2382767A1 (en) 1977-01-26 1978-06-08 SEMICONDUCTOR DEVICE MANUFACTURING PROCESS

Family Applications Before (2)

Application Number Title Priority Date Filing Date
FR7802068A Granted FR2382768A1 (en) 1977-01-26 1978-01-25 METHOD FOR PREPARING A SUBSTRATE SURFACE OF AN ISOPLANAR SEMICONDUCTOR DEVICE
FR7817175A Granted FR2382770A1 (en) 1977-01-26 1978-06-08 PROCESS FOR FORMING VERY SMALL CONTACT OPENINGS IN AN INTEGRATED CIRCUIT DEVICE

Family Applications After (2)

Application Number Title Priority Date Filing Date
FR7817173A Granted FR2382769A1 (en) 1977-01-26 1978-06-08 METHOD FOR MANUFACTURING HIGH DEFINITION POLYCRYSTALLINE SILICON LAYERS
FR7817174A Granted FR2382767A1 (en) 1977-01-26 1978-06-08 SEMICONDUCTOR DEVICE MANUFACTURING PROCESS

Country Status (5)

Country Link
JP (10) JPS5394190A (en)
DE (1) DE2802048A1 (en)
FR (5) FR2382768A1 (en)
GB (5) GB1595548A (en)
IT (1) IT1089299B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1089299B (en) * 1977-01-26 1985-06-18 Mostek Corp PROCEDURE FOR MANUFACTURING A SEMICONDUCTIVE DEVICE
JPS5713772A (en) * 1980-06-30 1982-01-23 Hitachi Ltd Semiconductor device and manufacture thereof
GB2290167B (en) * 1994-06-08 1999-01-20 Hyundai Electronics Ind Method for fabricating a semiconductor device
US9954176B1 (en) 2016-10-06 2018-04-24 International Business Machines Corporation Dielectric treatments for carbon nanotube devices

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2310609A1 (en) * 1975-05-05 1976-12-03 Intel Corp CELL AND PAIR OF MEMORY CELLS WITH DIRECT CONTACTLESS ACCESS
US3996658A (en) * 1975-03-31 1976-12-14 Fujitsu Ltd. Process for producing semiconductor memory device

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1053069A (en) * 1963-06-28
GB1175392A (en) * 1966-09-14 1969-12-23 Hitachi Ltd Method of Treating Protective Coatings for Semiconductor Devices
US3590477A (en) 1968-12-19 1971-07-06 Ibm Method for fabricating insulated-gate field effect transistors having controlled operating characeristics
NL7005296A (en) * 1969-04-15 1970-10-19
US3825997A (en) * 1969-10-02 1974-07-30 Sony Corp Method for making semiconductor device
DE2040180B2 (en) 1970-01-22 1977-08-25 Intel Corp, Mountain View, Calif. (V.St.A.) METHOD FOR PREVENTING MECHANICAL BREAKAGE OF A THIN ELECTRICALLY CONDUCTIVE LAYER COVERING THE SURFACE OF A SEMICONDUCTOR BODY
NL7109327A (en) * 1970-07-10 1972-01-12
US3811974A (en) * 1971-07-19 1974-05-21 North American Rockwell Silicon nitride-silicon oxide etchant
JPS5112507B2 (en) 1971-10-22 1976-04-20
JPS5139835B2 (en) * 1971-12-27 1976-10-29
DE2218035A1 (en) * 1972-04-14 1973-10-31 Vepa Ag METHOD AND DEVICE FOR CONTINUOUS FIXING AND SHRINKING OF SYNTHESIS FIBERS
DE2320195A1 (en) 1972-04-24 1973-12-13 Standard Microsyst Smc STORAGE FIELD EFFECT TRANSISTOR WITH SILICON BASE MANUFACTURED BY ION IMPLANTATION
US3810795A (en) * 1972-06-30 1974-05-14 Ibm Method for making self-aligning structure for charge-coupled and bucket brigade devices
JPS5910073B2 (en) * 1972-10-27 1984-03-06 株式会社日立製作所 Method for manufacturing silicon gate MOS type semiconductor device
US3898105A (en) * 1973-10-25 1975-08-05 Mostek Corp Method for making FET circuits
JPS50123274A (en) * 1974-03-15 1975-09-27
JPS5912495B2 (en) 1974-10-01 1984-03-23 カブシキガイシヤ ニツポンジドウシヤブヒンソウゴウケンキユウシヨ Collision detection device
US3984822A (en) * 1974-12-30 1976-10-05 Intel Corporation Double polycrystalline silicon gate memory device
JPS51118392A (en) 1975-04-10 1976-10-18 Matsushita Electric Ind Co Ltd Manuforcturing process for semiconductor unit
JPS51118393A (en) * 1975-04-10 1976-10-18 Matsushita Electric Ind Co Ltd Semicondector unit
US4002511A (en) * 1975-04-16 1977-01-11 Ibm Corporation Method for forming masks comprising silicon nitride and novel mask structures produced thereby
JPS51142982A (en) * 1975-05-05 1976-12-08 Intel Corp Method of producing single crystal silicon ic
JPS51139263A (en) * 1975-05-28 1976-12-01 Hitachi Ltd Method of selective oxidation of silicon substrate
NL7506594A (en) * 1975-06-04 1976-12-07 Philips Nv PROCEDURE FOR MANUFACTURING A SEMI-CONDUCTOR DEVICE AND SEMI-CONDUCTOR DEVICE MANUFACTURED USING THE PROCESS.
IT1061530B (en) * 1975-06-12 1983-04-30 Ncr Co METHOD FOR THE FORMATION OF ELECTRICAL CONNECTIONS IN SELECTED REGIONS OF A SURFACE OF A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
DE2532594B2 (en) * 1975-07-21 1980-05-22 Siemens Ag, 1000 Berlin Und 8000 Muenchen Semiconductor memory
GB1540450A (en) 1975-10-29 1979-02-14 Intel Corp Self-aligning double polycrystalline silicon etching process
US4240092A (en) 1976-09-13 1980-12-16 Texas Instruments Incorporated Random access memory cell with different capacitor and transistor oxide thickness
JPS6034270B2 (en) * 1976-01-12 1985-08-07 テキサス・インスツルメンツ・インコ−ポレイテツド Semiconductor memory device and its manufacturing method
US4112575A (en) * 1976-12-20 1978-09-12 Texas Instruments Incorporated Fabrication methods for the high capacity ram cell
IT1089299B (en) * 1977-01-26 1985-06-18 Mostek Corp PROCEDURE FOR MANUFACTURING A SEMICONDUCTIVE DEVICE
FR2584786B1 (en) * 1985-07-15 1989-10-27 Valeo ASSEMBLY OF THE RELEASE STOPPER AND RELEASE STOPPER SPECIFIC TO SUCH AN ASSEMBLY

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3996658A (en) * 1975-03-31 1976-12-14 Fujitsu Ltd. Process for producing semiconductor memory device
FR2310609A1 (en) * 1975-05-05 1976-12-03 Intel Corp CELL AND PAIR OF MEMORY CELLS WITH DIRECT CONTACTLESS ACCESS

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
EXBK/76 *

Also Published As

Publication number Publication date
GB1595548A (en) 1981-08-12
IT1089299B (en) 1985-06-18
JPH0917799A (en) 1997-01-17
GB1595545A (en) 1981-08-12
FR2382767A1 (en) 1978-09-29
JP2720911B2 (en) 1998-03-04
FR2382770A1 (en) 1978-09-29
JPS62290147A (en) 1987-12-17
FR2382768B1 (en) 1983-06-10
GB1595547A (en) 1981-08-12
GB1595543A (en) 1981-08-12
JPS62290181A (en) 1987-12-17
FR2382769A1 (en) 1978-09-29
JPS5760852A (en) 1982-04-13
JPS62290180A (en) 1987-12-17
FR2382767B1 (en) 1983-06-03
DE2802048C2 (en) 1993-02-11
JPH0362300B2 (en) 1991-09-25
GB1595546A (en) 1981-08-12
DE2802048A1 (en) 1978-07-27
JPS62290152A (en) 1987-12-17
FR2382770B1 (en) 1983-06-03
JPH098299A (en) 1997-01-10
JPH04107840U (en) 1992-09-17
FR2382745B1 (en) 1983-06-03
JPS5394190A (en) 1978-08-17
FR2382769B1 (en) 1983-06-03
FR2382768A1 (en) 1978-09-29
JPH0918003A (en) 1997-01-17

Similar Documents

Publication Publication Date Title
US4180826A (en) MOS double polysilicon read-only memory and cell
JPS56116670A (en) Semiconductor integrated circuit device and manufacture thereof
FR2406303A2 (en) PROCEDURE FOR MANUFACTURING A MEMORY CELL FOR A TRANSISTOR
FR2455800A1 (en) SOLAR CELL, PARTICULARLY SILICON, THE CONSTRUCTION OF WHICH AVOIDS THE HARMFUL EFFECTS OF DILATION DIFFERENCES ON CELL INTEGRITY
FR2445023A1 (en) METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT CONTAINING POLYCRYSTALLINE SILICON
FR2382745A1 (en) MEMORY CELL
JPS5718356A (en) Semiconductor memory storage
FR2379134A1 (en) SEMICONDUCTOR MEMORY
JPS53148256A (en) Nonvolatile semiconductor memory device
US4208726A (en) Programming of semiconductor read only memory
JPS52156580A (en) Semiconductor integrated circuit device and its production
JPS5364471A (en) Method of producing silicon nitride barrier on semiconductor substrate
TW338177B (en) Semiconductor device and a fabrication method thereof
JPS5670657A (en) Semiconductor memory device
KR940004609B1 (en) Mask read only memory
KR880009426A (en) Semiconductor memory device and manufacturing method thereof
IT8120995A0 (en) HIGH VOLTAGE, PASSIVATED WITH ONE LAYER SEMICONDUCTOR DEVICE OF OXYGEN-DOPED POLYCRYSTALLINE SILICON.
JPS54105987A (en) Manufacture of semiconductor device
JPS5245879A (en) Method of dividing semiconductor element
JPS5464983A (en) Manufacture of semiconductor device
JPS57133637A (en) Semiconductor integrated circuit device
JPS6442867A (en) Mis-type nonvolatile memory and manufacture thereof
JPS57176743A (en) Semiconductor integrated circuit device
KR830009647A (en) Semiconductor device
JPS57109368A (en) Semiconductor memory device

Legal Events

Date Code Title Description
TP Transmission of property
CA Change of address
CD Change of name or company name
TP Transmission of property