FR2380620A1 - Dispositifs a memoire morte programmable et procedes de fabrication s'y rapportant - Google Patents

Dispositifs a memoire morte programmable et procedes de fabrication s'y rapportant

Info

Publication number
FR2380620A1
FR2380620A1 FR7703631A FR7703631A FR2380620A1 FR 2380620 A1 FR2380620 A1 FR 2380620A1 FR 7703631 A FR7703631 A FR 7703631A FR 7703631 A FR7703631 A FR 7703631A FR 2380620 A1 FR2380620 A1 FR 2380620A1
Authority
FR
France
Prior art keywords
source region
common source
fixed value
extending down
semiconductor layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
FR7703631A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
American Microsystems Holding Corp
Original Assignee
American Microsystems Holding Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Microsystems Holding Corp filed Critical American Microsystems Holding Corp
Priority to FR7703631A priority Critical patent/FR2380620A1/fr
Publication of FR2380620A1 publication Critical patent/FR2380620A1/fr
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66825Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0416Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401Multistep manufacturing processes
    • H01L29/4011Multistep manufacturing processes for data storage electrodes
    • H01L29/40114Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Non-Volatile Memory (AREA)

Abstract

Le dispositif 20 utilise un réseau de cellules de mémoire 24, définies à intervalles réguliers sur une pastille par l'intersection de lignes de mots 26 parallèles et espacées, proches de la surface, et des lignes de bits 28, perpendiculaires aux lignes de mots, ensevelies à l'intérieur du dispositif. Pour fournir aux circuits périphériques un meilleur accès aux lignes de bits, on peut prevoir des lignes de bits 30 de surface interconnectées aux précédentes par des contacts verticaux 32. Des grilles flottantes 40 en forme de V sont isolées en dessous et au-dessus des lignes de bits et des lignes de mots par des couches minces d'oxyde. Les données sont enregistrées dans la cellule lorsque des électrons chauds, injectés dans l'oxyde de grille au voisinage de la jonction drain, sont attirés vers la grille flottante qui a été chargée positivement par un couplage capacitif à partir de la ligne de mots. Applications : mémoires à semiconducteurs et à circuits intégrés.
FR7703631A 1977-02-09 1977-02-09 Dispositifs a memoire morte programmable et procedes de fabrication s'y rapportant Pending FR2380620A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7703631A FR2380620A1 (fr) 1977-02-09 1977-02-09 Dispositifs a memoire morte programmable et procedes de fabrication s'y rapportant

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7703631A FR2380620A1 (fr) 1977-02-09 1977-02-09 Dispositifs a memoire morte programmable et procedes de fabrication s'y rapportant

Publications (1)

Publication Number Publication Date
FR2380620A1 true FR2380620A1 (fr) 1978-09-08

Family

ID=9186519

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7703631A Pending FR2380620A1 (fr) 1977-02-09 1977-02-09 Dispositifs a memoire morte programmable et procedes de fabrication s'y rapportant

Country Status (1)

Country Link
FR (1) FR2380620A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0023241A2 (fr) * 1979-03-30 1981-02-04 Siemens Aktiengesellschaft Conducteur de basse résistivité pour un dispositif semiconducteur et procédé pour sa fabrication
EP0043014A2 (fr) * 1980-06-16 1982-01-06 Rockwell International Corporation Ligne de transmission pour pastille à circuit intégré
EP0491581A2 (fr) * 1990-12-18 1992-06-24 Sundisk Corporation Structures verticales denses de cellules de mémoire morte programmable et procédés pour leur fabrication

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1354960A (fr) * 1963-01-29 1964-03-13 Csf Perfectionnements aux cibles à conductibilité induite
US3825946A (en) * 1971-01-15 1974-07-23 Intel Corp Electrically alterable floating gate device and method for altering same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1354960A (fr) * 1963-01-29 1964-03-13 Csf Perfectionnements aux cibles à conductibilité induite
US3825946A (en) * 1971-01-15 1974-07-23 Intel Corp Electrically alterable floating gate device and method for altering same

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
EXBK/74 *
EXBK/76 *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0023241A2 (fr) * 1979-03-30 1981-02-04 Siemens Aktiengesellschaft Conducteur de basse résistivité pour un dispositif semiconducteur et procédé pour sa fabrication
EP0023241A3 (en) * 1979-03-30 1983-08-24 Siemens Aktiengesellschaft Low-ohmic conductor for a semiconductor device and process for its manufacture
EP0043014A2 (fr) * 1980-06-16 1982-01-06 Rockwell International Corporation Ligne de transmission pour pastille à circuit intégré
EP0043014A3 (en) * 1980-06-16 1984-07-25 Rockwell International Corporation Integrated circuit chip transmission line
EP0491581A2 (fr) * 1990-12-18 1992-06-24 Sundisk Corporation Structures verticales denses de cellules de mémoire morte programmable et procédés pour leur fabrication
EP0491581A3 (en) * 1990-12-18 1993-07-28 Sundisk Corporation Dense vertical programmable read only memory cell structures and processes for making them

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