FR2378313A1 - Microprocessor memory access control system - uses exterior programme counter to process different lengths of instructions - Google Patents

Microprocessor memory access control system - uses exterior programme counter to process different lengths of instructions

Info

Publication number
FR2378313A1
FR2378313A1 FR7801069A FR7801069A FR2378313A1 FR 2378313 A1 FR2378313 A1 FR 2378313A1 FR 7801069 A FR7801069 A FR 7801069A FR 7801069 A FR7801069 A FR 7801069A FR 2378313 A1 FR2378313 A1 FR 2378313A1
Authority
FR
France
Prior art keywords
instruction
different lengths
instructions
control system
position unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7801069A
Other languages
French (fr)
Inventor
Dietrich Illi
Detlev Hornburger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Standard Electric Corp
Original Assignee
International Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Standard Electric Corp filed Critical International Standard Electric Corp
Publication of FR2378313A1 publication Critical patent/FR2378313A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3818—Decoding for concurrent execution
    • G06F9/382—Pipelined decoding, e.g. using predecoding
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • G06F9/30152—Determining start or end of instruction; determining instruction length
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/321—Program or instruction counter, e.g. incrementing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)

Abstract

The system uses programme calculator exterior to the computer to process instruction of different lengths (number of words). The programme calculator controls parallel reading of m instruction words from a memory towards the register of a position unit. The position unit has an instruction decoder which detects the length of following instruction. The output of the instruction decoder is connected to a circuit which controls the transfer of the instructing from the position unit to an intermediate memory and the positioning of the following instruction. The calculator executes the instruction stored in the intermediate memory. The memory is composed of m blocks, m being at least as large as the largest number n of words contained in the instruction. The registers of the position unit have at least m+n emplacements whilst the intermediate memory has only n, each being capable of storing an instruction word.
FR7801069A 1977-01-22 1978-01-16 Microprocessor memory access control system - uses exterior programme counter to process different lengths of instructions Withdrawn FR2378313A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19772702586 DE2702586C3 (en) 1977-01-22 1977-01-22 Circuit arrangement for controlling memory access in a computer

Publications (1)

Publication Number Publication Date
FR2378313A1 true FR2378313A1 (en) 1978-08-18

Family

ID=5999288

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7801069A Withdrawn FR2378313A1 (en) 1977-01-22 1978-01-16 Microprocessor memory access control system - uses exterior programme counter to process different lengths of instructions

Country Status (4)

Country Link
AU (1) AU3164077A (en)
BE (1) BE863099R (en)
DE (1) DE2702586C3 (en)
FR (1) FR2378313A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0326136A2 (en) * 1988-01-26 1989-08-02 Nec Corporation Queue device capable of quickly transferring a digital signal unit of a word length different from a single word length

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0776917B2 (en) * 1984-12-29 1995-08-16 ソニー株式会社 Micro computer
DE3642994C2 (en) * 1985-12-21 1997-12-11 Aeg Schneider Automation Gmbh Method and arrangement for controlling the data that can be processed by a microprocessor or microcomputer with a defined instruction set in a certain period of time by successively processing instructions
JP2779557B2 (en) * 1991-07-09 1998-07-23 三菱電機株式会社 Parallel processing unit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3162841A (en) * 1961-11-14 1964-12-22 Ibm Instruction counter system
FR2336735A1 (en) * 1975-12-22 1977-07-22 Siemens Ag DEVICE AND METHOD FOR PROCESSING MACHINE INSTRUCTIONS HAVING DIFFERENT FORMATS IN A MICROPROGRAMME DATA PROCESSING SYSTEM

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3162841A (en) * 1961-11-14 1964-12-22 Ibm Instruction counter system
FR2336735A1 (en) * 1975-12-22 1977-07-22 Siemens Ag DEVICE AND METHOD FOR PROCESSING MACHINE INSTRUCTIONS HAVING DIFFERENT FORMATS IN A MICROPROGRAMME DATA PROCESSING SYSTEM

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
EXBK/74 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0326136A2 (en) * 1988-01-26 1989-08-02 Nec Corporation Queue device capable of quickly transferring a digital signal unit of a word length different from a single word length
EP0326136A3 (en) * 1988-01-26 1991-06-12 Nec Corporation Queue device capable of quickly transferring a digital signal unit of a word length different from a single word length

Also Published As

Publication number Publication date
DE2702586C3 (en) 1979-07-05
DE2702586A1 (en) 1978-07-27
BE863099R (en) 1978-07-20
DE2702586B2 (en) 1978-11-02
AU3164077A (en) 1979-06-21

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Legal Events

Date Code Title Description
ST Notification of lapse