JPS5794853A - Data processor - Google Patents

Data processor

Info

Publication number
JPS5794853A
JPS5794853A JP55169609A JP16960980A JPS5794853A JP S5794853 A JPS5794853 A JP S5794853A JP 55169609 A JP55169609 A JP 55169609A JP 16960980 A JP16960980 A JP 16960980A JP S5794853 A JPS5794853 A JP S5794853A
Authority
JP
Japan
Prior art keywords
instruction
line
pointer
circuit
new
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55169609A
Other languages
Japanese (ja)
Inventor
Masato Yamagishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP55169609A priority Critical patent/JPS5794853A/en
Priority to KR1019810004378A priority patent/KR880000817B1/en
Publication of JPS5794853A publication Critical patent/JPS5794853A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)

Abstract

PURPOSE:To reduce the processing time of an instruction, by providing two pointers for selection of an instruction register and shifting the value of the older pointer to the other pointer when the calculation of an operand address is over. CONSTITUTION:The instructions which are prefetched and read out of a storage device 1 are stored in instruction registers 2-7. The output of these registers plus the outputs of an old instruction pointer 14, a new instruction pointer 15 and a microinstruction line 19 are connected to a new/old instruction switching circuit 16. The circuit 16 produces a general-purpose register address line 21, an instruction code line 22 and a new instruction length line 23 respectively. The line 22 is supplied to an arithmetic code converting circuit 17 along with a microstruction line 20 to produce an arithmetic code. A pointer replacing circuit 18 produces the value of replacement for each pointer by using the pointers 14 and 15 plus the line 23 as an input.
JP55169609A 1980-12-03 1980-12-03 Data processor Pending JPS5794853A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP55169609A JPS5794853A (en) 1980-12-03 1980-12-03 Data processor
KR1019810004378A KR880000817B1 (en) 1980-12-03 1981-11-13 Data processing apparatus and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55169609A JPS5794853A (en) 1980-12-03 1980-12-03 Data processor

Publications (1)

Publication Number Publication Date
JPS5794853A true JPS5794853A (en) 1982-06-12

Family

ID=15889665

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55169609A Pending JPS5794853A (en) 1980-12-03 1980-12-03 Data processor

Country Status (2)

Country Link
JP (1) JPS5794853A (en)
KR (1) KR880000817B1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59160239A (en) * 1983-03-02 1984-09-10 Hitachi Ltd Information processing device
JPS59194246A (en) * 1983-02-02 1984-11-05 ジヨン エフ コウリユ−ア Method and apparatus for performing pipeline type processingwith single arithmetic logic unit

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5099652A (en) * 1973-12-29 1975-08-07
JPS5145946A (en) * 1974-10-17 1976-04-19 Fujitsu Ltd DEETASHORISHI SUTEMU
JPS5230351A (en) * 1975-09-04 1977-03-08 Nippon Telegr & Teleph Corp <Ntt> Data processing unit
JPS5324243A (en) * 1976-08-17 1978-03-06 Int Computers Ltd Data processor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5099652A (en) * 1973-12-29 1975-08-07
JPS5145946A (en) * 1974-10-17 1976-04-19 Fujitsu Ltd DEETASHORISHI SUTEMU
JPS5230351A (en) * 1975-09-04 1977-03-08 Nippon Telegr & Teleph Corp <Ntt> Data processing unit
JPS5324243A (en) * 1976-08-17 1978-03-06 Int Computers Ltd Data processor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59194246A (en) * 1983-02-02 1984-11-05 ジヨン エフ コウリユ−ア Method and apparatus for performing pipeline type processingwith single arithmetic logic unit
JPS59160239A (en) * 1983-03-02 1984-09-10 Hitachi Ltd Information processing device
JPH0218732B2 (en) * 1983-03-02 1990-04-26 Hitachi Ltd

Also Published As

Publication number Publication date
KR830008243A (en) 1983-11-16
KR880000817B1 (en) 1988-05-11

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