FR2357036A1 - Memoire du type " premier entre, premier sorti " et ses circuits de commande - Google Patents

Memoire du type " premier entre, premier sorti " et ses circuits de commande

Info

Publication number
FR2357036A1
FR2357036A1 FR7717615A FR7717615A FR2357036A1 FR 2357036 A1 FR2357036 A1 FR 2357036A1 FR 7717615 A FR7717615 A FR 7717615A FR 7717615 A FR7717615 A FR 7717615A FR 2357036 A1 FR2357036 A1 FR 2357036A1
Authority
FR
France
Prior art keywords
memory
control circuits
type memory
entered
addressed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7717615A
Other languages
English (en)
French (fr)
Other versions
FR2357036B1 (enExample
Inventor
John E Campbell
Gerhard R Thompson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2357036A1 publication Critical patent/FR2357036A1/fr
Application granted granted Critical
Publication of FR2357036B1 publication Critical patent/FR2357036B1/fr
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12Replacement control
    • G06F12/121Replacement control using replacement algorithms
    • G06F12/123Replacement control using replacement algorithms with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
FR7717615A 1976-07-02 1977-06-02 Memoire du type " premier entre, premier sorti " et ses circuits de commande Granted FR2357036A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/702,363 US4095283A (en) 1976-07-02 1976-07-02 First in-first out memory array containing special bits for replacement addressing

Publications (2)

Publication Number Publication Date
FR2357036A1 true FR2357036A1 (fr) 1978-01-27
FR2357036B1 FR2357036B1 (enExample) 1980-02-08

Family

ID=24820919

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7717615A Granted FR2357036A1 (fr) 1976-07-02 1977-06-02 Memoire du type " premier entre, premier sorti " et ses circuits de commande

Country Status (7)

Country Link
US (1) US4095283A (enExample)
JP (1) JPS603657B2 (enExample)
CA (1) CA1080366A (enExample)
DE (1) DE2725396B2 (enExample)
FR (1) FR2357036A1 (enExample)
GB (1) GB1533831A (enExample)
IT (1) IT1115357B (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2506028A1 (fr) * 1981-05-15 1982-11-19 Omera Segid Dispositif d'oubli pour invalider des informations contenues dans une memoire depuis un certain temps et radar comportant un tel dispositif
FR2655445A1 (fr) * 1989-12-01 1991-06-07 Philips Electronique Lab Dispositif de controle d'une memoire tampon et methode de gestion de donnees numeriques.

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1590835A (en) * 1976-11-12 1981-06-10 Rolls Royce Data processing methods and systems
NL7713707A (nl) * 1977-12-12 1979-06-14 Philips Nv Informatiebuffergeheugen van het "eerst-in, eerst-uit" type met variabele ingang en vaste uitgang.
GB2030739B (en) * 1978-09-29 1982-06-30 Nat Res Dev Computer store arrangements
WO1980002610A1 (en) * 1979-05-23 1980-11-27 Telxon Corp Portable data entry device including dynamic partitioning of data memory
JPS58501296A (ja) * 1981-08-18 1983-08-04 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Lruペ−シング・バツフア・プ−ルを通してデ−タ・ベ−スのデマンド・アクセスを行なう際のスラツシング減少
JPS5960341A (ja) * 1982-09-30 1984-04-06 Rikagaku Kenkyusho レ−ザ−回折像を用いる粒度分布測定法
US4707134A (en) * 1984-12-04 1987-11-17 The Dow Chemical Company Fiber optic probe
US5019971A (en) * 1987-04-13 1991-05-28 Prime Computer, Inc. High availability cache organization
JPH0827756B2 (ja) * 1987-04-13 1996-03-21 三菱電機株式会社 Icカード
AU604101B2 (en) * 1987-04-13 1990-12-06 Computervision Corporation High availability cache organization
JPH0630053B2 (ja) * 1989-02-13 1994-04-20 株式会社東芝 遅延バッファ回路
US5274647A (en) * 1989-02-13 1993-12-28 Kabushiki Kaisha Toshiba Elastic buffer with error detection using a hamming distance circuit
US5016221A (en) * 1989-12-01 1991-05-14 National Semiconductor Corporation First-in, first-out (FIFO) memory with variable commit point
US5155825A (en) * 1989-12-27 1992-10-13 Motorola, Inc. Page address translation cache replacement algorithm with improved testability
EP0463967A3 (en) * 1990-06-29 1993-02-24 Digital Equipment Corporation Cache set selection for high-performance processor
US6167499A (en) * 1997-05-20 2000-12-26 Vlsi Technology, Inc. Memory space compression technique for a sequentially accessible memory
US6314485B1 (en) * 1997-11-14 2001-11-06 Agere Systems Guardian Corp. Automatic status register
FR2848327B1 (fr) * 2002-12-06 2005-02-25 Thales Sa Procede de gestion de l'ecriture dans une memoire

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1483564A (enExample) * 1965-06-18 1967-09-06
US3984817A (en) * 1973-11-08 1976-10-05 Honeywell Information Systems, Inc. Data processing system having improved program allocation and search technique
US4008460A (en) * 1975-12-24 1977-02-15 International Business Machines Corporation Circuit for implementing a modified LRU replacement algorithm for a cache

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2506028A1 (fr) * 1981-05-15 1982-11-19 Omera Segid Dispositif d'oubli pour invalider des informations contenues dans une memoire depuis un certain temps et radar comportant un tel dispositif
EP0066319A1 (fr) * 1981-05-15 1982-12-08 Societe D'optique, De Mecanique D'electricite Et De Radio O.M.E.R.A. - S.E.G.I.D. Dispositif d'oubli pour invalider des informations contenues dans une mémoire depuis un certain temps et radar comportant un tel dispositif
FR2655445A1 (fr) * 1989-12-01 1991-06-07 Philips Electronique Lab Dispositif de controle d'une memoire tampon et methode de gestion de donnees numeriques.

Also Published As

Publication number Publication date
US4095283A (en) 1978-06-13
DE2725396B2 (de) 1979-02-15
CA1080366A (en) 1980-06-24
DE2725396C3 (enExample) 1979-10-18
JPS603657B2 (ja) 1985-01-30
JPS535937A (en) 1978-01-19
FR2357036B1 (enExample) 1980-02-08
IT1115357B (it) 1986-02-03
GB1533831A (en) 1978-11-29
DE2725396A1 (de) 1978-01-05

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Legal Events

Date Code Title Description
ST Notification of lapse