FR2284981A1 - Procede d'obtention d'un circuit integre semiconducteur - Google Patents
Procede d'obtention d'un circuit integre semiconducteurInfo
- Publication number
- FR2284981A1 FR2284981A1 FR7430623A FR7430623A FR2284981A1 FR 2284981 A1 FR2284981 A1 FR 2284981A1 FR 7430623 A FR7430623 A FR 7430623A FR 7430623 A FR7430623 A FR 7430623A FR 2284981 A1 FR2284981 A1 FR 2284981A1
- Authority
- FR
- France
- Prior art keywords
- obtaining
- semiconductor circuit
- integrated semiconductor
- integrated
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Weting (AREA)
Priority Applications (11)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7430623A FR2284981A1 (fr) | 1974-09-10 | 1974-09-10 | Procede d'obtention d'un circuit integre semiconducteur |
DE2538264A DE2538264C3 (de) | 1974-09-10 | 1975-08-28 | Verfahren zur Herstellung einer planaren integrierten Halbleiteranordnung |
NL7510427A NL7510427A (nl) | 1974-09-10 | 1975-09-04 | Werkwijze voor het vervaardigen van een geintegreerde halfgeleiderschakeling. |
CA234,787A CA1035470A (en) | 1974-09-10 | 1975-09-04 | Method of manufacturing an integrated semiconductor circuit |
CH1153875A CH591163A5 (xx) | 1974-09-10 | 1975-09-05 | |
IT26982/75A IT1042339B (it) | 1974-09-10 | 1975-09-05 | Metodo di fabbricazione di un circutto integrato a semiconduttori |
GB36624/75A GB1518988A (en) | 1974-09-10 | 1975-09-05 | Integrated circuit |
JP50107586A JPS5744017B2 (xx) | 1974-09-10 | 1975-09-06 | |
AU84610/75A AU495942B2 (en) | 1975-09-08 | Method of manufacturing an integrated semiconductor circuit | |
AT692075A AT359562B (de) | 1974-09-10 | 1975-09-08 | Verfahren zur herstellung einer planaren integrierten halbleiterschaltung |
SE7509970A SE415421B (sv) | 1974-09-10 | 1975-09-08 | Sett att framstella ett elektriskt isolerande skikt pa en integrerad halvledarkrets |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7430623A FR2284981A1 (fr) | 1974-09-10 | 1974-09-10 | Procede d'obtention d'un circuit integre semiconducteur |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2284981A1 true FR2284981A1 (fr) | 1976-04-09 |
FR2284981B1 FR2284981B1 (xx) | 1978-11-24 |
Family
ID=9142928
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7430623A Granted FR2284981A1 (fr) | 1974-09-10 | 1974-09-10 | Procede d'obtention d'un circuit integre semiconducteur |
Country Status (10)
Country | Link |
---|---|
JP (1) | JPS5744017B2 (xx) |
AT (1) | AT359562B (xx) |
CA (1) | CA1035470A (xx) |
CH (1) | CH591163A5 (xx) |
DE (1) | DE2538264C3 (xx) |
FR (1) | FR2284981A1 (xx) |
GB (1) | GB1518988A (xx) |
IT (1) | IT1042339B (xx) |
NL (1) | NL7510427A (xx) |
SE (1) | SE415421B (xx) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2414792A1 (fr) * | 1978-01-17 | 1979-08-10 | Hitachi Ltd | Methode de formation d'une interconnexion |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2535525A1 (fr) * | 1982-10-29 | 1984-05-04 | Western Electric Co | Procede de fabrication de circuits integres comportant des couches isolantes minces |
JPH053192A (ja) * | 1991-10-25 | 1993-01-08 | Matsushita Electron Corp | 半導体集積回路 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR1531852A (fr) * | 1966-07-15 | 1968-07-05 | Itt | Procédé de masquage de la surface d'un support |
FR2116424A1 (xx) * | 1970-12-01 | 1972-07-13 | Siemens Ag | |
FR2162657A1 (xx) * | 1971-12-06 | 1973-07-20 | Tektronix Inc | |
FR2203175A1 (xx) * | 1972-10-16 | 1974-05-10 | Matsushita Electric Ind Co Ltd |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3979768A (en) * | 1966-03-23 | 1976-09-07 | Hitachi, Ltd. | Semiconductor element having surface coating comprising silicon nitride and silicon oxide films |
FR1536321A (fr) * | 1966-06-30 | 1968-08-10 | Texas Instruments Inc | Contacts ohmiques pour des dispositifs à semi-conducteurs |
US3474310A (en) * | 1967-02-03 | 1969-10-21 | Hitachi Ltd | Semiconductor device having a sulfurtreated silicon compound thereon and a method of making the same |
US3442012A (en) * | 1967-08-03 | 1969-05-06 | Teledyne Inc | Method of forming a flip-chip integrated circuit |
-
1974
- 1974-09-10 FR FR7430623A patent/FR2284981A1/fr active Granted
-
1975
- 1975-08-28 DE DE2538264A patent/DE2538264C3/de not_active Expired
- 1975-09-04 CA CA234,787A patent/CA1035470A/en not_active Expired
- 1975-09-04 NL NL7510427A patent/NL7510427A/xx not_active Application Discontinuation
- 1975-09-05 IT IT26982/75A patent/IT1042339B/it active
- 1975-09-05 CH CH1153875A patent/CH591163A5/xx not_active IP Right Cessation
- 1975-09-05 GB GB36624/75A patent/GB1518988A/en not_active Expired
- 1975-09-06 JP JP50107586A patent/JPS5744017B2/ja not_active Expired
- 1975-09-08 SE SE7509970A patent/SE415421B/xx unknown
- 1975-09-08 AT AT692075A patent/AT359562B/de not_active IP Right Cessation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR1531852A (fr) * | 1966-07-15 | 1968-07-05 | Itt | Procédé de masquage de la surface d'un support |
FR2116424A1 (xx) * | 1970-12-01 | 1972-07-13 | Siemens Ag | |
FR2162657A1 (xx) * | 1971-12-06 | 1973-07-20 | Tektronix Inc | |
FR2203175A1 (xx) * | 1972-10-16 | 1974-05-10 | Matsushita Electric Ind Co Ltd |
Non-Patent Citations (1)
Title |
---|
REVUE "SOLID STATE TECHNOLOGY", VOLUME 13, NO. 2, FEVRIER 1970 "IMPROVED METHOD OF FABRICATING PLANAR GALLIUM ARSENIDE DIODES" PAGE 12) * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2414792A1 (fr) * | 1978-01-17 | 1979-08-10 | Hitachi Ltd | Methode de formation d'une interconnexion |
Also Published As
Publication number | Publication date |
---|---|
DE2538264A1 (de) | 1976-03-18 |
IT1042339B (it) | 1980-01-30 |
SE415421B (sv) | 1980-09-29 |
DE2538264C3 (de) | 1982-01-14 |
JPS5153491A (xx) | 1976-05-11 |
CH591163A5 (xx) | 1977-09-15 |
GB1518988A (en) | 1978-07-26 |
AT359562B (de) | 1980-11-25 |
FR2284981B1 (xx) | 1978-11-24 |
JPS5744017B2 (xx) | 1982-09-18 |
DE2538264B2 (de) | 1981-04-30 |
NL7510427A (nl) | 1976-03-12 |
CA1035470A (en) | 1978-07-25 |
ATA692075A (de) | 1980-04-15 |
SE7509970L (sv) | 1976-03-11 |
AU8461075A (en) | 1977-03-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |