FI963296A0 - Pääteverkko ja ohjauspiiri - Google Patents

Pääteverkko ja ohjauspiiri

Info

Publication number
FI963296A0
FI963296A0 FI963296A FI963296A FI963296A0 FI 963296 A0 FI963296 A0 FI 963296A0 FI 963296 A FI963296 A FI 963296A FI 963296 A FI963296 A FI 963296A FI 963296 A0 FI963296 A0 FI 963296A0
Authority
FI
Finland
Prior art keywords
control circuit
terminal network
network
terminal
circuit
Prior art date
Application number
FI963296A
Other languages
English (en)
Finnish (fi)
Swedish (sv)
Other versions
FI963296A (fi
Inventor
Mats Hedberg
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Publication of FI963296A publication Critical patent/FI963296A/fi
Publication of FI963296A0 publication Critical patent/FI963296A0/fi

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/28—Impedance matching networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Logic Circuits (AREA)
  • Networks Using Active Elements (AREA)
  • Dram (AREA)
  • Interface Circuits In Exchanges (AREA)
FI963296A 1994-02-25 1996-08-23 Pääteverkko ja ohjauspiiri FI963296A0 (fi)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9400657A SE9400657D0 (sv) 1994-02-25 1994-02-25 En, en kontrollspänning alstrande, krets
PCT/SE1995/000146 WO1995024089A2 (en) 1994-02-25 1995-02-13 A termination network and a control circuit

Publications (2)

Publication Number Publication Date
FI963296A FI963296A (fi) 1996-08-23
FI963296A0 true FI963296A0 (fi) 1996-08-23

Family

ID=20393085

Family Applications (1)

Application Number Title Priority Date Filing Date
FI963296A FI963296A0 (fi) 1994-02-25 1996-08-23 Pääteverkko ja ohjauspiiri

Country Status (14)

Country Link
US (1) US5726582A (de)
EP (1) EP0746934B1 (de)
JP (1) JPH09509806A (de)
KR (1) KR100257850B1 (de)
CN (1) CN1083195C (de)
AU (1) AU686763B2 (de)
BR (1) BR9506874A (de)
CA (1) CA2181678A1 (de)
DE (1) DE69531236T2 (de)
FI (1) FI963296A0 (de)
MX (1) MX9603267A (de)
NO (1) NO963476L (de)
SE (1) SE9400657D0 (de)
WO (1) WO1995024089A2 (de)

Families Citing this family (46)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE502835C2 (sv) * 1994-11-23 1996-01-29 Ellemtel Utvecklings Ab Termineringsnätsrelaterat kopplingsarrangemang
DE19618527A1 (de) * 1996-05-08 1998-12-24 Ericsson Telefon Ab L M Leitungsempfängerschaltkreis
US6037798A (en) * 1996-05-08 2000-03-14 Telefonaktiebolaget Lm Ericsson Line receiver circuit having termination impedances with transmission gates connected in parallel
DE19654221B4 (de) 1996-12-23 2005-11-24 Telefonaktiebolaget Lm Ericsson (Publ) Leitungsanschlußschaltkreis
DE19735982C2 (de) 1997-08-19 2000-04-27 Ericsson Telefon Ab L M Leitungsempfängerschaltkreis mit Leitungsabschlußimpedanz
EP0961126B1 (de) * 1998-05-29 2008-01-09 STMicroelectronics S.r.l. Schwachstromüberwachung durch "low-side" getriebenen DMOS mittels Modulierung seines inneren Widerstands
KR100295154B1 (ko) 1998-06-12 2001-09-17 윤종용 임피던스정합회로
US6157206A (en) * 1998-12-31 2000-12-05 Intel Corporation On-chip termination
US6418500B1 (en) * 1999-02-12 2002-07-09 Fujitsu Limited Feedback control for termination adjustment
US6424169B1 (en) 2000-01-24 2002-07-23 Broadcom Corporation Active termination network
US6816987B1 (en) 2000-03-25 2004-11-09 Broadcom Corporation Apparatus and method for built-in self-test of a data communications system
DE10021371A1 (de) * 2000-05-02 2001-11-08 Infineon Technologies Ag Schaltungsanordnung
US6417675B1 (en) * 2000-08-31 2002-07-09 Intel Corporation Receiver impedance calibration arrangements in full duplex communication systems
TW536066U (en) 2001-03-13 2003-06-01 Realtek Semiconductor Corp Impedance matching circuit
JP4676646B2 (ja) * 2001-05-11 2011-04-27 ルネサスエレクトロニクス株式会社 インピーダンス調整回路および半導体装置
US6529074B1 (en) 2001-07-26 2003-03-04 Cirrus Logic, Inc. Circuits and methods for output impedance matching in switched mode circuits
US6603329B1 (en) * 2001-08-29 2003-08-05 Altera Corporation Systems and methods for on-chip impedance termination
US6798237B1 (en) 2001-08-29 2004-09-28 Altera Corporation On-chip impedance matching circuit
US6657906B2 (en) 2001-11-28 2003-12-02 Micron Technology, Inc. Active termination circuit and method for controlling the impedance of external integrated circuit terminals
US6836144B1 (en) 2001-12-10 2004-12-28 Altera Corporation Programmable series on-chip termination impedance and impedance matching
US7109744B1 (en) 2001-12-11 2006-09-19 Altera Corporation Programmable termination with DC voltage level control
US6812734B1 (en) 2001-12-11 2004-11-02 Altera Corporation Programmable termination with DC voltage level control
US6766155B2 (en) * 2002-01-24 2004-07-20 Agilent Technologies, Inc. Fixed termination scheme for differential receiver that compensates for process, voltage, and temperature variations
TW591357B (en) * 2002-10-11 2004-06-11 Delta Electronics Inc A circuit for generating a linear current control signal and method thereof
JP2004362695A (ja) 2003-06-05 2004-12-24 Renesas Technology Corp 半導体記憶装置
US6888369B1 (en) 2003-07-17 2005-05-03 Altera Corporation Programmable on-chip differential termination impedance
US6859064B1 (en) 2003-08-20 2005-02-22 Altera Corporation Techniques for reducing leakage current in on-chip impedance termination circuits
US6888370B1 (en) 2003-08-20 2005-05-03 Altera Corporation Dynamically adjustable termination impedance control techniques
US6924660B2 (en) 2003-09-08 2005-08-02 Rambus Inc. Calibration methods and circuits for optimized on-die termination
US7019553B2 (en) 2003-12-01 2006-03-28 Micron Technology, Inc. Method and circuit for off chip driver control, and memory device using same
US6980020B2 (en) * 2003-12-19 2005-12-27 Rambus Inc. Calibration methods and circuits for optimized on-die termination
US7196567B2 (en) * 2004-12-20 2007-03-27 Rambus Inc. Systems and methods for controlling termination resistance values for a plurality of communication channels
US7218155B1 (en) 2005-01-20 2007-05-15 Altera Corporation Techniques for controlling on-chip termination resistance using voltage range detection
US7221193B1 (en) 2005-01-20 2007-05-22 Altera Corporation On-chip termination with calibrated driver strength
US7389194B2 (en) 2005-07-06 2008-06-17 Rambus Inc. Driver calibration methods and circuits
JP2007028330A (ja) * 2005-07-19 2007-02-01 Nec Electronics Corp 半導体回路及び抵抗値制御方法
US7679397B1 (en) 2005-08-05 2010-03-16 Altera Corporation Techniques for precision biasing output driver for a calibrated on-chip termination circuit
US7439760B2 (en) 2005-12-19 2008-10-21 Rambus Inc. Configurable on-die termination
JP4876987B2 (ja) 2007-03-12 2012-02-15 住友電気工業株式会社 受信回路
JP5369472B2 (ja) * 2008-03-31 2013-12-18 富士通株式会社 半導体装置
US20100164471A1 (en) * 2008-12-30 2010-07-01 M2000 Calibration of programmable i/o components using a virtual variable external resistor
JP2016188907A (ja) * 2015-03-30 2016-11-04 セイコーエプソン株式会社 体積ホログラフィック素子、体積ホログラフィック素子の製造方法、および表示装置
JP6053997B1 (ja) * 2015-11-25 2016-12-27 三菱電機株式会社 フィルタ装置
US10425361B2 (en) 2017-03-16 2019-09-24 Trane International Inc. Dynamic allocation of termination resistors in a communication network
US10411009B1 (en) * 2018-07-31 2019-09-10 Ronald Quan Field effect transistor circuits
US11431334B2 (en) 2020-04-06 2022-08-30 Analog Devices International Unlimited Company Closed loop switch control system and method

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CH628462A5 (fr) * 1978-12-22 1982-02-26 Centre Electron Horloger Source de tension de reference.
US4719369A (en) * 1985-08-14 1988-01-12 Hitachi, Ltd. Output circuit having transistor monitor for matching output impedance to load impedance
US4760292A (en) * 1986-10-29 1988-07-26 Eta Systems, Inc. Temperature compensated output buffer
US4748426A (en) * 1986-11-07 1988-05-31 Rodime Plc Active termination circuit for computer interface use
US4918336A (en) * 1987-05-19 1990-04-17 Gazelle Microcircuits, Inc. Capacitor coupled push pull logic circuit
US4837459A (en) * 1987-07-13 1989-06-06 International Business Machines Corp. CMOS reference voltage generation
US4924113A (en) * 1988-07-18 1990-05-08 Harris Semiconductor Patents, Inc. Transistor base current compensation circuitry
US5030856A (en) * 1989-05-04 1991-07-09 International Business Machines Corporation Receiver and level converter circuit with dual feedback
NL8901170A (nl) * 1989-05-10 1990-12-03 Philips Nv Geintegreerde schakeling met een signaalniveauconverter.
US5043605A (en) * 1989-06-26 1991-08-27 At&T Bell Laboratories CMOS to ECL output buffer
JP2902016B2 (ja) * 1989-11-21 1999-06-07 株式会社日立製作所 信号伝送方法および回路
US5175451A (en) * 1990-10-08 1992-12-29 Sharp Kabushiki Kaisha Biasing circuit for sense amplifier
US5341039A (en) * 1991-04-19 1994-08-23 Mitsubishi Denki Kabushiki Kaisha High frequency integrated circuit device including a circuit for decreasing reflected signals in wiring formed on a semiconductor substrate
US5382841A (en) * 1991-12-23 1995-01-17 Motorola, Inc. Switchable active bus termination circuit
JPH073958B2 (ja) * 1992-01-31 1995-01-18 インターナショナル・ビジネス・マシーンズ・コーポレイション 終端回路
US5381034A (en) * 1992-04-27 1995-01-10 Dallas Semiconductor Corporation SCSI terminator
US5227677A (en) * 1992-06-10 1993-07-13 International Business Machines Corporation Zero power transmission line terminator
US5357156A (en) * 1992-07-10 1994-10-18 Lattice Semiconductor Corporation Active clamp circuit scheme for CMOS devices
US5361038A (en) * 1993-03-11 1994-11-01 Trw Inc. Active load applications for distributed circuits
US5381057A (en) * 1993-05-03 1995-01-10 Kabushiki Kaisha Toshiba ECL gate having active pull-down transistor
US5361042A (en) * 1993-06-18 1994-11-01 Digital Equipment Corporation Compensated offset voltage, low gain, high bandwidth, full swing, wide common mode range, CMOS differential voltage amplifier
US5365197A (en) * 1993-06-30 1994-11-15 Texas Instruments Incorporated Low-noise distributed amplifier

Also Published As

Publication number Publication date
EP0746934B1 (de) 2003-07-09
KR100257850B1 (ko) 2000-06-01
WO1995024089A2 (en) 1995-09-08
MX9603267A (es) 1997-03-29
US5726582A (en) 1998-03-10
DE69531236D1 (de) 2003-08-14
CN1083195C (zh) 2002-04-17
FI963296A (fi) 1996-08-23
WO1995024089A3 (en) 1995-10-05
CA2181678A1 (en) 1995-09-08
BR9506874A (pt) 1997-09-09
EP0746934A1 (de) 1996-12-11
SE9400657D0 (sv) 1994-02-25
JPH09509806A (ja) 1997-09-30
AU686763B2 (en) 1998-02-12
NO963476L (no) 1996-08-21
CN1141702A (zh) 1997-01-29
AU1864995A (en) 1995-09-18
DE69531236T2 (de) 2004-05-27
KR970701467A (ko) 1997-03-17

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