FI914608A - Databehandlingsanordning foer att dynamiskt saetta tidsanpassningar i ett dynamiskt minnessystem. - Google Patents

Databehandlingsanordning foer att dynamiskt saetta tidsanpassningar i ett dynamiskt minnessystem. Download PDF

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Publication number
FI914608A
FI914608A FI914608A FI914608A FI914608A FI 914608 A FI914608 A FI 914608A FI 914608 A FI914608 A FI 914608A FI 914608 A FI914608 A FI 914608A FI 914608 A FI914608 A FI 914608A
Authority
FI
Finland
Prior art keywords
dynamiskt
tidsanpassningar
minnessystem
databehandlingsanordning
saetta
Prior art date
Application number
FI914608A
Other languages
English (en)
Other versions
FI914608A0 (fi
Inventor
Alfredo Aldereguia
Patrick Maurice Bland
Daryl Carvis Cromer
Roger Max Stutes
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of FI914608A0 publication Critical patent/FI914608A0/fi
Publication of FI914608A publication Critical patent/FI914608A/fi

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4243Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Memory System (AREA)
  • Complex Calculations (AREA)
FI914608A 1990-10-01 1991-10-01 Databehandlingsanordning foer att dynamiskt saetta tidsanpassningar i ett dynamiskt minnessystem. FI914608A (fi)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/590,978 US5522064A (en) 1990-10-01 1990-10-01 Data processing apparatus for dynamically setting timings in a dynamic memory system

Publications (2)

Publication Number Publication Date
FI914608A0 FI914608A0 (fi) 1991-10-01
FI914608A true FI914608A (fi) 1992-04-02

Family

ID=24364514

Family Applications (1)

Application Number Title Priority Date Filing Date
FI914608A FI914608A (fi) 1990-10-01 1991-10-01 Databehandlingsanordning foer att dynamiskt saetta tidsanpassningar i ett dynamiskt minnessystem.

Country Status (14)

Country Link
US (1) US5522064A (fi)
EP (1) EP0479428B1 (fi)
JP (1) JPH0772877B2 (fi)
KR (1) KR950013257B1 (fi)
CN (1) CN1026926C (fi)
AU (1) AU652570B2 (fi)
BR (1) BR9103873A (fi)
CA (1) CA2051175C (fi)
DE (1) DE69124905T2 (fi)
FI (1) FI914608A (fi)
HK (1) HK1000067A1 (fi)
NO (1) NO913799L (fi)
PT (1) PT99116A (fi)
SG (1) SG44436A1 (fi)

Families Citing this family (79)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5752066A (en) * 1992-01-06 1998-05-12 International Business Machines Corporation Data processing system utilizing progammable microprogram memory controller
TW390446U (en) * 1992-10-01 2000-05-11 Hudson Soft Co Ltd Information processing system
DE69433147D1 (de) * 1993-04-30 2003-10-16 Packard Bell Nec Inc Symmetrisches Mehrprozessorsystem mit vereinheitlichter Umgebung und verteilten Systemfunktionen
US5809340A (en) * 1993-04-30 1998-09-15 Packard Bell Nec Adaptively generating timing signals for access to various memory devices based on stored profiles
JP3608804B2 (ja) * 1993-05-14 2005-01-12 株式会社ソニー・コンピュータエンタテインメント バス制御装置
US5375084A (en) * 1993-11-08 1994-12-20 International Business Machines Corporation Selectable interface between memory controller and memory simms
JPH07248963A (ja) * 1994-03-08 1995-09-26 Nec Corp Dram制御装置
JP2704113B2 (ja) * 1994-04-26 1998-01-26 日本電気アイシーマイコンシステム株式会社 データ処理装置
US5727005A (en) * 1994-08-31 1998-03-10 Le; Chinh H. Integrated circuit microprocessor with programmable memory access interface types
JP3153078B2 (ja) * 1994-09-09 2001-04-03 日本電気株式会社 データ処理装置
JP2630271B2 (ja) * 1994-09-14 1997-07-16 日本電気株式会社 情報処理装置
AU703750B2 (en) * 1994-10-14 1999-04-01 Compaq Computer Corporation Easily programmable memory controller which can access different speed memory devices on different cycles
JPH08123717A (ja) * 1994-10-25 1996-05-17 Oki Electric Ind Co Ltd 半導体記憶装置
US5694585A (en) * 1994-11-10 1997-12-02 International Business Machines Corporation Programmable memory controller and data terminal equipment
US20030009616A1 (en) * 1994-11-30 2003-01-09 Brian K. Langendorf Method and apparatus for integrating and determining whether a memory subsystem is installed with standard page mode memory or an extended data out memory
US6804760B2 (en) 1994-12-23 2004-10-12 Micron Technology, Inc. Method for determining a type of memory present in a system
US6525971B2 (en) 1995-06-30 2003-02-25 Micron Technology, Inc. Distributed write data drivers for burst access memories
US5682354A (en) * 1995-11-06 1997-10-28 Micron Technology, Inc. CAS recognition in burst extended data out DRAM
US5610864A (en) 1994-12-23 1997-03-11 Micron Technology, Inc. Burst EDO memory device with maximized write cycle timing
US5526320A (en) * 1994-12-23 1996-06-11 Micron Technology Inc. Burst EDO memory device
US5729504A (en) * 1995-12-14 1998-03-17 Micron Technology, Inc. Continuous burst edo memory device
US6567904B1 (en) * 1995-12-29 2003-05-20 Intel Corporation Method and apparatus for automatically detecting whether a memory unit location is unpopulated or populated with synchronous or asynchronous memory devices
US7681005B1 (en) * 1996-01-11 2010-03-16 Micron Technology, Inc. Asynchronously-accessible memory device with mode selection circuitry for burst or pipelined operation
US6061759A (en) * 1996-02-09 2000-05-09 Apex Semiconductor, Inc. Hidden precharge pseudo cache DRAM
US5740382A (en) * 1996-03-28 1998-04-14 Motorola, Inc. Method and apparatus for accessing a chip-selectable device in a data processing system
US6981126B1 (en) 1996-07-03 2005-12-27 Micron Technology, Inc. Continuous interleave burst access
US6401186B1 (en) 1996-07-03 2002-06-04 Micron Technology, Inc. Continuous burst memory which anticipates a next requested start address
US5703832A (en) * 1997-02-28 1997-12-30 Etron Technology, Inc. tRAS protection circuit
US5737271A (en) * 1997-02-28 1998-04-07 Etron Technology, Inc. Semiconductor memory arrays
KR100578112B1 (ko) * 1998-10-16 2006-07-25 삼성전자주식회사 메모리 클럭 신호를 제어하는 컴퓨터 시스템 및그 방법
KR100287190B1 (ko) * 1999-04-07 2001-04-16 윤종용 선택되는 메모리 모듈만을 데이터 라인에 연결하는 메모리 모듈 시스템 및 이를 이용한 데이터 입출력 방법
US6414868B1 (en) 1999-06-07 2002-07-02 Sun Microsystems, Inc. Memory expansion module including multiple memory banks and a bank control circuit
US6684314B1 (en) * 2000-07-14 2004-01-27 Agilent Technologies, Inc. Memory controller with programmable address configuration
US20020144173A1 (en) * 2001-03-30 2002-10-03 Micron Technology, Inc. Serial presence detect driven memory clock control
US6625702B2 (en) * 2001-04-07 2003-09-23 Hewlett-Packard Development Company, L.P. Memory controller with support for memory modules comprised of non-homogeneous data width RAM devices
US6889335B2 (en) * 2001-04-07 2005-05-03 Hewlett-Packard Development Company, L.P. Memory controller receiver circuitry with tri-state noise immunity
US6678811B2 (en) * 2001-04-07 2004-01-13 Hewlett-Packard Development Company, L.P. Memory controller with 1X/MX write capability
US6633965B2 (en) * 2001-04-07 2003-10-14 Eric M. Rentschler Memory controller with 1×/M× read capability
CN1315040C (zh) * 2002-01-08 2007-05-09 北京南思达科技发展有限公司 一种逻辑可重组电路
US7117292B2 (en) * 2002-10-11 2006-10-03 Broadcom Corporation Apparatus and method to switch a FIFO between strobe sources
US6958944B1 (en) * 2004-05-26 2005-10-25 Taiwan Semiconductor Manufacturing Co., Ltd. Enhanced refresh circuit and method for reduction of DRAM refresh cycles
JP4620974B2 (ja) * 2004-06-30 2011-01-26 富士通株式会社 表示パネル用制御装置及びそれを有する表示装置
US7389375B2 (en) 2004-07-30 2008-06-17 International Business Machines Corporation System, method and storage medium for a multi-mode memory buffer device
US7296129B2 (en) 2004-07-30 2007-11-13 International Business Machines Corporation System, method and storage medium for providing a serialized memory interface with a bus repeater
US7539800B2 (en) * 2004-07-30 2009-05-26 International Business Machines Corporation System, method and storage medium for providing segment level sparing
US7466607B2 (en) * 2004-09-30 2008-12-16 Analog Devices, Inc. Memory access system and method using de-coupled read and write circuits
US7512762B2 (en) * 2004-10-29 2009-03-31 International Business Machines Corporation System, method and storage medium for a memory subsystem with positional read data latency
US7299313B2 (en) * 2004-10-29 2007-11-20 International Business Machines Corporation System, method and storage medium for a memory subsystem command interface
US7356737B2 (en) * 2004-10-29 2008-04-08 International Business Machines Corporation System, method and storage medium for testing a memory module
US7441060B2 (en) * 2004-10-29 2008-10-21 International Business Machines Corporation System, method and storage medium for providing a service interface to a memory system
US7395476B2 (en) * 2004-10-29 2008-07-01 International Business Machines Corporation System, method and storage medium for providing a high speed test interface to a memory subsystem
US7305574B2 (en) * 2004-10-29 2007-12-04 International Business Machines Corporation System, method and storage medium for bus calibration in a memory subsystem
US7331010B2 (en) 2004-10-29 2008-02-12 International Business Machines Corporation System, method and storage medium for providing fault detection and correction in a memory subsystem
US7277988B2 (en) * 2004-10-29 2007-10-02 International Business Machines Corporation System, method and storage medium for providing data caching and data compression in a memory subsystem
US20060095620A1 (en) * 2004-10-29 2006-05-04 International Business Machines Corporation System, method and storage medium for merging bus data in a memory subsystem
US7571296B2 (en) * 2004-11-11 2009-08-04 Nvidia Corporation Memory controller-adaptive 1T/2T timing control
US7927948B2 (en) 2005-07-20 2011-04-19 Micron Technology, Inc. Devices with nanocrystals and methods of formation
US7478259B2 (en) 2005-10-31 2009-01-13 International Business Machines Corporation System, method and storage medium for deriving clocks in a memory system
US7685392B2 (en) * 2005-11-28 2010-03-23 International Business Machines Corporation Providing indeterminate read data latency in a memory system
US7636813B2 (en) * 2006-05-22 2009-12-22 International Business Machines Corporation Systems and methods for providing remote pre-fetch buffers
US7594055B2 (en) 2006-05-24 2009-09-22 International Business Machines Corporation Systems and methods for providing distributed technology independent memory controllers
US7640386B2 (en) * 2006-05-24 2009-12-29 International Business Machines Corporation Systems and methods for providing memory modules with multiple hub devices
US7584336B2 (en) * 2006-06-08 2009-09-01 International Business Machines Corporation Systems and methods for providing data modification operations in memory subsystems
US7493439B2 (en) 2006-08-01 2009-02-17 International Business Machines Corporation Systems and methods for providing performance monitoring in a memory system
US7669086B2 (en) * 2006-08-02 2010-02-23 International Business Machines Corporation Systems and methods for providing collision detection in a memory system
US7581073B2 (en) * 2006-08-09 2009-08-25 International Business Machines Corporation Systems and methods for providing distributed autonomous power management in a memory system
US7587559B2 (en) 2006-08-10 2009-09-08 International Business Machines Corporation Systems and methods for memory module power management
US7490217B2 (en) 2006-08-15 2009-02-10 International Business Machines Corporation Design structure for selecting memory busses according to physical memory organization information stored in virtual address translation tables
US7539842B2 (en) 2006-08-15 2009-05-26 International Business Machines Corporation Computer memory system for selecting memory buses according to physical memory organization information stored in virtual address translation tables
US7870459B2 (en) 2006-10-23 2011-01-11 International Business Machines Corporation High density high reliability memory module with power gating and a fault tolerant address and command bus
US7477522B2 (en) 2006-10-23 2009-01-13 International Business Machines Corporation High density high reliability memory module with a fault tolerant address and command bus
KR100936149B1 (ko) * 2006-12-29 2010-01-12 삼성전자주식회사 복수의 비휘발성 메모리를 갖는 메모리 시스템 그것의 메모리 억세스 방법
US7721140B2 (en) 2007-01-02 2010-05-18 International Business Machines Corporation Systems and methods for improving serviceability of a memory system
US7603526B2 (en) 2007-01-29 2009-10-13 International Business Machines Corporation Systems and methods for providing dynamic memory pre-fetch
US7606988B2 (en) * 2007-01-29 2009-10-20 International Business Machines Corporation Systems and methods for providing a dynamic memory bank page policy
US8122232B2 (en) * 2007-06-21 2012-02-21 Arm Limited Self programming slave device controller
US8688901B2 (en) 2009-12-08 2014-04-01 Intel Corporation Reconfigurable load-reduced memory buffer
CN103366793B (zh) 2012-03-28 2017-08-11 飞思卡尔半导体公司 同步存储器数据传输中的时序控制
US8797823B2 (en) 2012-10-23 2014-08-05 International Business Machines Corporation Implementing SDRAM having no RAS to CAS delay in write operation

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3800295A (en) * 1971-12-30 1974-03-26 Ibm Asynchronously operated memory system
US3753232A (en) * 1972-04-06 1973-08-14 Honeywell Inf Systems Memory control system adaptive to different access and cycle times
US4014006A (en) * 1973-08-10 1977-03-22 Data General Corporation Data processing system having a unique cpu and memory tuning relationship and data path configuration
JPS5475233A (en) * 1977-11-29 1979-06-15 Toshiba Corp Memory controller
US4366540A (en) * 1978-10-23 1982-12-28 International Business Machines Corporation Cycle control for a microprocessor with multi-speed control stores
US4435757A (en) * 1979-07-25 1984-03-06 The Singer Company Clock control for digital computer
JPS57101957A (en) * 1980-12-17 1982-06-24 Hitachi Ltd Storage control device
US4633392A (en) * 1982-04-05 1986-12-30 Texas Instruments Incorporated Self-configuring digital processor system with logical arbiter
US4660141A (en) * 1983-12-06 1987-04-21 Tri Sigma Corporation Self configuring computer network with automatic bus exchange of module identification numbers and processor assigned module numbers
US4825404A (en) * 1985-11-27 1989-04-25 Tektronix, Inc. Interface system which generates configuration control signal and duplex control signal for automatically determining the configuration of removable modules
JPS62190999U (fi) * 1986-05-23 1987-12-04
CA1330596C (en) * 1986-11-19 1994-07-05 Yoshiaki Nakanishi Memory cartridge and data processing apparatus
US4926314A (en) * 1987-03-17 1990-05-15 Apple Computer, Inc. Method and apparatus for determining available memory size
GB2204163B (en) * 1987-04-11 1991-10-16 Apple Computer Self-identifying scheme for memory
KR960009249B1 (ko) * 1987-04-24 1996-07-16 미다 가쓰시게 반도체 메모리
US4980850A (en) * 1987-05-14 1990-12-25 Digital Equipment Corporation Automatic sizing memory system with multiplexed configuration signals at memory modules
JPS63184497U (fi) * 1987-05-21 1988-11-28
US5003506A (en) * 1987-06-02 1991-03-26 Anritsu Corporation Memory capacity detection apparatus and electronic applied measuring device employing the same
US4899272A (en) * 1987-10-23 1990-02-06 Chips & Technologies, Inc. Addressing multiple types of memory devices
US4951248A (en) * 1988-03-04 1990-08-21 Sun Microsystems, Inc. Self configuring memory system
US5034917A (en) * 1988-05-26 1991-07-23 Bland Patrick M Computer system including a page mode memory with decreased access time and method of operation thereof
US5042003A (en) * 1988-07-06 1991-08-20 Zenith Data Systems Corporation Memory usage system
US5097437A (en) * 1988-07-17 1992-03-17 Larson Ronald J Controller with clocking device controlling first and second state machine controller which generate different control signals for different set of devices
US5027313A (en) * 1988-08-25 1991-06-25 Compaq Computer Corporation Apparatus for determining maximum usable memory size
JPH02235156A (ja) * 1989-03-08 1990-09-18 Canon Inc 情報処理装置
US4967397A (en) * 1989-05-15 1990-10-30 Unisys Corporation Dynamic RAM controller
US4998222A (en) * 1989-12-04 1991-03-05 Nec Electronics Inc. Dynamic random access memory with internally gated RAS

Also Published As

Publication number Publication date
AU8345291A (en) 1992-04-02
JPH04230544A (ja) 1992-08-19
EP0479428A1 (en) 1992-04-08
CA2051175A1 (en) 1992-04-02
KR950013257B1 (ko) 1995-10-26
DE69124905D1 (de) 1997-04-10
NO913799D0 (no) 1991-09-27
NO913799L (no) 1992-04-02
CN1060730A (zh) 1992-04-29
HK1000067A1 (en) 1997-11-07
AU652570B2 (en) 1994-09-01
CA2051175C (en) 1998-03-31
FI914608A0 (fi) 1991-10-01
US5522064A (en) 1996-05-28
DE69124905T2 (de) 1997-09-18
KR920008594A (ko) 1992-05-28
EP0479428B1 (en) 1997-03-05
PT99116A (pt) 1994-01-31
SG44436A1 (en) 1997-12-19
BR9103873A (pt) 1992-06-16
JPH0772877B2 (ja) 1995-08-02
CN1026926C (zh) 1994-12-07

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