ES8800537A1 - Disposicion para ajustar el comportamiento funcional (performancia) de un aparato para tratamiento de informacion. - Google Patents

Disposicion para ajustar el comportamiento funcional (performancia) de un aparato para tratamiento de informacion.

Info

Publication number
ES8800537A1
ES8800537A1 ES553484A ES553484A ES8800537A1 ES 8800537 A1 ES8800537 A1 ES 8800537A1 ES 553484 A ES553484 A ES 553484A ES 553484 A ES553484 A ES 553484A ES 8800537 A1 ES8800537 A1 ES 8800537A1
Authority
ES
Spain
Prior art keywords
performance
processing apparatus
information processing
unit
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES553484A
Other languages
English (en)
Other versions
ES553484A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of ES8800537A1 publication Critical patent/ES8800537A1/es
Publication of ES553484A0 publication Critical patent/ES553484A0/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3856—Reordering of instructions, e.g. using queues or age tags
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3869—Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3871—Asynchronous instruction pipeline, e.g. using handshake signals between stages

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Debugging And Monitoring (AREA)
  • Feedback Control In General (AREA)
  • Advance Control (AREA)

Abstract

DISPOSITIVO PARA AJUSTAR LA PERFORMANCIA DE UN APARATO PARA TRATAMIENTO DE INFORMACION. SE COMPONE DE: UNA PORCION GENERADORA DE IMPULSOS (11) QUE TIENE UN CONTADOR DE EXPLORACION (16) QUE EFECTUA UN RECUENTO EN SENTIDO ASCENDENTE A CADA IMPULSO DE RELOJ, UN REGISTRO (17) DE VALORES OBJETO EN LA MODALIDAD PROBLEMA, UN REGISTRO (18) DE VALORES OBJETO EN LA MODALIDAD DE SUPERVISION, UNOS COMPARADORES EN LA MODALIDAD DE SUPERVISION, UNOS COMPARADORES (19, 20), UNOS CIRCUITOS DE CONJUNCION (21, 22) Y UN CIRCUITO INVERSOR (23); UNA PORCION (14) DE CONTROL DE EJECUCION Y UNA UNIDAD (15) DE TRATAMIENTO DE SERVICIO.
ES553484A 1985-03-29 1986-03-26 Disposicion para ajustar el comportamiento funcional (performancia) de un aparato para tratamiento de informacion. Expired ES8800537A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60065809A JPH0623954B2 (ja) 1985-03-29 1985-03-29 情報処理装置の性能調整方式

Publications (2)

Publication Number Publication Date
ES8800537A1 true ES8800537A1 (es) 1987-11-01
ES553484A0 ES553484A0 (es) 1987-11-01

Family

ID=13297722

Family Applications (1)

Application Number Title Priority Date Filing Date
ES553484A Expired ES8800537A1 (es) 1985-03-29 1986-03-26 Disposicion para ajustar el comportamiento funcional (performancia) de un aparato para tratamiento de informacion.

Country Status (9)

Country Link
US (1) US4910671A (es)
EP (1) EP0196964B1 (es)
JP (1) JPH0623954B2 (es)
KR (1) KR900002437B1 (es)
AU (1) AU560785B2 (es)
BR (1) BR8601384A (es)
CA (1) CA1249373A (es)
DE (1) DE3683786D1 (es)
ES (1) ES8800537A1 (es)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01315828A (ja) * 1988-06-15 1989-12-20 Fujitsu Ltd 情報処理装置の性能調整制御方式
GB8820183D0 (en) * 1988-08-25 1988-09-28 Int Computers Ltd Data processing apparatus
JPH0823819B2 (ja) * 1988-12-05 1996-03-06 富士通株式会社 情報処理装置
US5220659A (en) * 1989-09-18 1993-06-15 Micral, Inc. System for matching data recovery time between different devices by extending a cycle upon detecting end of cycle
DE4029598A1 (de) * 1990-09-19 1992-03-26 Philips Patentverwaltung Schaltungsanordnung zur zeitweisen verzoegerung des programmablaufs in einem mikroprozessor
US5367699A (en) * 1991-11-26 1994-11-22 Bull Hn Information Systems Inc. Central processing unit incorporation selectable, precisa ratio, speed of execution derating
DE4231703C2 (de) * 1992-09-22 1996-01-11 Siemens Ag Mikroprozessor mit CPU und EEPROM
US5535376A (en) * 1993-05-18 1996-07-09 Motorola, Inc. Data processor having a timer circuit for performing a buffered pulse width modulation function and method therefor
IL110181A (en) * 1994-06-30 1998-02-08 Softchip Israel Ltd Install microprocessor and peripherals
FR2807591B1 (fr) * 2000-04-06 2003-08-08 Gemplus Card Int Procede de contre-mesure pour un micro-controleur base sur une architecture avec "pipeline"
US20030163541A1 (en) * 2002-02-25 2003-08-28 Austin James F. System and method for distributing information
US7913069B2 (en) * 2006-02-16 2011-03-22 Vns Portfolio Llc Processor and method for executing a program loop within an instruction word
JP5459207B2 (ja) 2008-06-30 2014-04-02 富士通株式会社 情報処理装置の性能調整装置及び方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7416635A (nl) * 1974-12-20 1976-06-22 Bell Telephone Mfg Gegevens verwerkend stelsel.
US4208724A (en) * 1977-10-17 1980-06-17 Sperry Corporation System and method for clocking data between a remote unit and a local unit
US4191998A (en) * 1978-03-29 1980-03-04 Honeywell Inc. Variable symmetry multiphase clock generator
US4366540A (en) * 1978-10-23 1982-12-28 International Business Machines Corporation Cycle control for a microprocessor with multi-speed control stores
US4458308A (en) * 1980-10-06 1984-07-03 Honeywell Information Systems Inc. Microprocessor controlled communications controller having a stretched clock cycle
US4414637A (en) * 1981-01-13 1983-11-08 Honeywell Information Systems Inc. Adjustable clock system having a dynamically selectable clock period
US4447870A (en) * 1981-04-03 1984-05-08 Honeywell Information Systems Inc. Apparatus for setting the basic clock timing in a data processing system
JPS58109937A (ja) 1981-12-23 1983-06-30 Fujitsu Ltd グレ−ド可変コンピユ−タ
JP2514922B2 (ja) * 1985-01-30 1996-07-10 株式会社日立製作所 情報処理装置の性能制御方式
JPS61184638A (ja) * 1985-02-12 1986-08-18 Nec Corp 情報処理装置

Also Published As

Publication number Publication date
EP0196964B1 (en) 1992-02-05
KR860007596A (ko) 1986-10-15
KR900002437B1 (ko) 1990-04-14
AU5494386A (en) 1986-10-02
DE3683786D1 (de) 1992-03-19
CA1249373A (en) 1989-01-24
AU560785B2 (en) 1987-04-16
JPS61246840A (ja) 1986-11-04
EP0196964A3 (en) 1988-08-24
JPH0623954B2 (ja) 1994-03-30
BR8601384A (pt) 1986-12-02
US4910671A (en) 1990-03-20
EP0196964A2 (en) 1986-10-08
ES553484A0 (es) 1987-11-01

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Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 20020506