ES8304391A1 - Perfeccionamientos en los sistemas circuitales para nudos de comunicacion. - Google Patents

Perfeccionamientos en los sistemas circuitales para nudos de comunicacion.

Info

Publication number
ES8304391A1
ES8304391A1 ES511762A ES511762A ES8304391A1 ES 8304391 A1 ES8304391 A1 ES 8304391A1 ES 511762 A ES511762 A ES 511762A ES 511762 A ES511762 A ES 511762A ES 8304391 A1 ES8304391 A1 ES 8304391A1
Authority
ES
Spain
Prior art keywords
pcm
signals
aligning
delay
relating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES511762A
Other languages
English (en)
Spanish (es)
Other versions
ES511762A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Italtel SpA
Original Assignee
Italtel SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Italtel SpA filed Critical Italtel SpA
Publication of ES511762A0 publication Critical patent/ES511762A0/es
Publication of ES8304391A1 publication Critical patent/ES8304391A1/es
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0626—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators
    • H04J3/0629—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators in a network, e.g. in combination with switching or multiplexing, slip buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computer Hardware Design (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
ES511762A 1981-04-30 1982-04-28 Perfeccionamientos en los sistemas circuitales para nudos de comunicacion. Expired ES8304391A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8121477A IT8121477A0 (it) 1981-04-30 1981-04-30 Disposizione circuitale atta ad allineare tra loro una pluralita'di fasci pcm coerenti che pervengono ad un nodo di comunicazione.

Publications (2)

Publication Number Publication Date
ES511762A0 ES511762A0 (es) 1983-03-16
ES8304391A1 true ES8304391A1 (es) 1983-03-16

Family

ID=11182405

Family Applications (1)

Application Number Title Priority Date Filing Date
ES511762A Expired ES8304391A1 (es) 1981-04-30 1982-04-28 Perfeccionamientos en los sistemas circuitales para nudos de comunicacion.

Country Status (9)

Country Link
BR (1) BR8202163A (enrdf_load_stackoverflow)
DE (1) DE3216040A1 (enrdf_load_stackoverflow)
ES (1) ES8304391A1 (enrdf_load_stackoverflow)
FR (1) FR2505108A1 (enrdf_load_stackoverflow)
GB (1) GB2102251A (enrdf_load_stackoverflow)
GR (1) GR76041B (enrdf_load_stackoverflow)
IT (1) IT8121477A0 (enrdf_load_stackoverflow)
PT (1) PT74815B (enrdf_load_stackoverflow)
YU (1) YU90982A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2601534B1 (fr) * 1986-07-10 1993-07-30 Cit Alcatel Procede et dispositif de calage en phase de trains numeriques synchrones
CA2050650A1 (en) * 1990-11-28 1992-05-29 Shahrukh S. Merchant Phase aligner

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE789775A (fr) * 1971-10-06 1973-04-06 Siemens Ag Dispositif de synchronisation mutuelle des oscillateurs de cadence de centraux d'un systeme de telecommunications pcm a multiplexage dans le temps
DE2247666C2 (de) * 1972-09-28 1975-02-20 Siemens Ag, 1000 Berlin Und 8000 Muenchen Schaltungsanordnung zur gegenseitigen Synchronisierung der In den Vermittlungsstellen eines PCM-Zeitmultlplex-FernmeMenetzes vorgesehenen Amtstaktoszillatoren
DE2641547C2 (de) * 1976-09-15 1980-11-20 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Übernahme von PCM Informationen
DE2936938C2 (de) * 1979-09-12 1987-01-08 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zum Ausgleich der Phasenunterschiede zwischen dem Streckentakt auf einer mit einer PCM-Vermittlungsstelle verbindenden PCM-Zeitmultiplexleitung und dem Amtstakt dieser Vermittlungsstelle

Also Published As

Publication number Publication date
GB2102251A (en) 1983-01-26
GR76041B (enrdf_load_stackoverflow) 1984-08-03
BR8202163A (pt) 1983-03-29
DE3216040A1 (de) 1982-11-25
YU90982A (en) 1985-03-20
ES511762A0 (es) 1983-03-16
FR2505108A1 (fr) 1982-11-05
PT74815B (en) 1983-11-30
IT8121477A0 (it) 1981-04-30
PT74815A (en) 1982-05-01

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