JPS5616340A - Multiplex transmission system of signal - Google Patents
Multiplex transmission system of signalInfo
- Publication number
- JPS5616340A JPS5616340A JP9290179A JP9290179A JPS5616340A JP S5616340 A JPS5616340 A JP S5616340A JP 9290179 A JP9290179 A JP 9290179A JP 9290179 A JP9290179 A JP 9290179A JP S5616340 A JPS5616340 A JP S5616340A
- Authority
- JP
- Japan
- Prior art keywords
- counter
- master unit
- switch
- nch
- program
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
- Small-Scale Networks (AREA)
Abstract
PURPOSE:To decrease the delay of the response time by using the preset counter which can program the divided numbers for the counter at the address producing part of the master unit and then giving the number of necessary channels (CH) by the switch. CONSTITUTION:In the system in which the pulse signals are transmitted and received in a successive and cyclic way between the master unit and plural numbers of terminals, the address producing part of the master unit is formed by clock oscillator 10, 2<n>-bit counter 12 which can program the divided numbers, and DIP switch 13 each. Thus the operator presets the maximum bumber N of CH to counter 12 in the binary code and by switch 13. Accordingly, the address data returns again to NCH with NCH-1CH to increase the response time in accordance with the using CH.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9290179A JPS5616340A (en) | 1979-07-20 | 1979-07-20 | Multiplex transmission system of signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9290179A JPS5616340A (en) | 1979-07-20 | 1979-07-20 | Multiplex transmission system of signal |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5616340A true JPS5616340A (en) | 1981-02-17 |
Family
ID=14067364
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9290179A Pending JPS5616340A (en) | 1979-07-20 | 1979-07-20 | Multiplex transmission system of signal |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5616340A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6154739A (en) * | 1984-08-25 | 1986-03-19 | Matsushita Electric Works Ltd | Transmission system |
JPS61117942A (en) * | 1984-11-13 | 1986-06-05 | Meidensha Electric Mfg Co Ltd | Test system for data transmission system |
-
1979
- 1979-07-20 JP JP9290179A patent/JPS5616340A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6154739A (en) * | 1984-08-25 | 1986-03-19 | Matsushita Electric Works Ltd | Transmission system |
JPS61117942A (en) * | 1984-11-13 | 1986-06-05 | Meidensha Electric Mfg Co Ltd | Test system for data transmission system |
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