GB2102251A - Improvements in or relating to circuit arrangements for aligning PCM bundles supplied to communication nodes - Google Patents
Improvements in or relating to circuit arrangements for aligning PCM bundles supplied to communication nodes Download PDFInfo
- Publication number
- GB2102251A GB2102251A GB08212656A GB8212656A GB2102251A GB 2102251 A GB2102251 A GB 2102251A GB 08212656 A GB08212656 A GB 08212656A GB 8212656 A GB8212656 A GB 8212656A GB 2102251 A GB2102251 A GB 2102251A
- Authority
- GB
- United Kingdom
- Prior art keywords
- pcm
- signals
- output
- circuit
- functional unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 230000007704 transition Effects 0.000 claims abstract description 16
- 230000015654 memory Effects 0.000 claims description 23
- 230000000295 complement effect Effects 0.000 claims description 6
- 230000004044 response Effects 0.000 claims description 5
- 230000001419 dependent effect Effects 0.000 claims 3
- 101000885321 Homo sapiens Serine/threonine-protein kinase DCLK1 Proteins 0.000 abstract description 23
- 102100039758 Serine/threonine-protein kinase DCLK1 Human genes 0.000 abstract description 23
- 238000010586 diagram Methods 0.000 description 14
- 230000003111 delayed effect Effects 0.000 description 9
- 230000000630 rising effect Effects 0.000 description 8
- 230000001934 delay Effects 0.000 description 4
- 239000011159 matrix material Substances 0.000 description 3
- 238000005070 sampling Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000001427 coherent effect Effects 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 2
- 230000002123 temporal effect Effects 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 1
- 230000002547 anomalous effect Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
- H04J3/0626—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators
- H04J3/0629—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators in a network, e.g. in combination with switching or multiplexing, slip buffers
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Computer Hardware Design (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT8121477A IT8121477A0 (it) | 1981-04-30 | 1981-04-30 | Disposizione circuitale atta ad allineare tra loro una pluralita'di fasci pcm coerenti che pervengono ad un nodo di comunicazione. |
Publications (1)
Publication Number | Publication Date |
---|---|
GB2102251A true GB2102251A (en) | 1983-01-26 |
Family
ID=11182405
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08212656A Withdrawn GB2102251A (en) | 1981-04-30 | 1982-04-30 | Improvements in or relating to circuit arrangements for aligning PCM bundles supplied to communication nodes |
Country Status (9)
Country | Link |
---|---|
BR (1) | BR8202163A (enrdf_load_stackoverflow) |
DE (1) | DE3216040A1 (enrdf_load_stackoverflow) |
ES (1) | ES8304391A1 (enrdf_load_stackoverflow) |
FR (1) | FR2505108A1 (enrdf_load_stackoverflow) |
GB (1) | GB2102251A (enrdf_load_stackoverflow) |
GR (1) | GR76041B (enrdf_load_stackoverflow) |
IT (1) | IT8121477A0 (enrdf_load_stackoverflow) |
PT (1) | PT74815B (enrdf_load_stackoverflow) |
YU (1) | YU90982A (enrdf_load_stackoverflow) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4780891A (en) * | 1986-07-10 | 1988-10-25 | Alcatel Cit | Method and device for synchronizing sychronous digital bit streams |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2050650A1 (en) * | 1990-11-28 | 1992-05-29 | Shahrukh S. Merchant | Phase aligner |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
BE789775A (fr) * | 1971-10-06 | 1973-04-06 | Siemens Ag | Dispositif de synchronisation mutuelle des oscillateurs de cadence de centraux d'un systeme de telecommunications pcm a multiplexage dans le temps |
DE2247666C2 (de) * | 1972-09-28 | 1975-02-20 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Schaltungsanordnung zur gegenseitigen Synchronisierung der In den Vermittlungsstellen eines PCM-Zeitmultlplex-FernmeMenetzes vorgesehenen Amtstaktoszillatoren |
DE2641547C2 (de) * | 1976-09-15 | 1980-11-20 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zur Übernahme von PCM Informationen |
DE2936938C2 (de) * | 1979-09-12 | 1987-01-08 | Siemens AG, 1000 Berlin und 8000 München | Schaltungsanordnung zum Ausgleich der Phasenunterschiede zwischen dem Streckentakt auf einer mit einer PCM-Vermittlungsstelle verbindenden PCM-Zeitmultiplexleitung und dem Amtstakt dieser Vermittlungsstelle |
-
1981
- 1981-04-30 IT IT8121477A patent/IT8121477A0/it unknown
-
1982
- 1982-04-06 GR GR67824A patent/GR76041B/el unknown
- 1982-04-15 BR BR8202163A patent/BR8202163A/pt unknown
- 1982-04-27 YU YU00909/82A patent/YU90982A/xx unknown
- 1982-04-28 ES ES511762A patent/ES8304391A1/es not_active Expired
- 1982-04-28 PT PT74815A patent/PT74815B/pt unknown
- 1982-04-29 DE DE19823216040 patent/DE3216040A1/de not_active Withdrawn
- 1982-04-30 GB GB08212656A patent/GB2102251A/en not_active Withdrawn
- 1982-04-30 FR FR8207501A patent/FR2505108A1/fr not_active Withdrawn
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4780891A (en) * | 1986-07-10 | 1988-10-25 | Alcatel Cit | Method and device for synchronizing sychronous digital bit streams |
Also Published As
Publication number | Publication date |
---|---|
GR76041B (enrdf_load_stackoverflow) | 1984-08-03 |
BR8202163A (pt) | 1983-03-29 |
DE3216040A1 (de) | 1982-11-25 |
YU90982A (en) | 1985-03-20 |
ES511762A0 (es) | 1983-03-16 |
FR2505108A1 (fr) | 1982-11-05 |
PT74815B (en) | 1983-11-30 |
IT8121477A0 (it) | 1981-04-30 |
PT74815A (en) | 1982-05-01 |
ES8304391A1 (es) | 1983-03-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |