ES8104593A1 - Cycle steal mechanism - Google Patents
Cycle steal mechanismInfo
- Publication number
- ES8104593A1 ES8104593A1 ES493786A ES493786A ES8104593A1 ES 8104593 A1 ES8104593 A1 ES 8104593A1 ES 493786 A ES493786 A ES 493786A ES 493786 A ES493786 A ES 493786A ES 8104593 A1 ES8104593 A1 ES 8104593A1
- Authority
- ES
- Spain
- Prior art keywords
- memory
- data
- towards
- unit
- controller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Bus Control (AREA)
- Programmable Controllers (AREA)
Abstract
Input/output controller device for data transfer. The controlling device (2), which functions by monociclic interruption, transfers the data from a memory (7) of a central computer (1) towards a plurality of units (3, 4, 5, 6). The device (2) bases its performance in a micro-order (11), a control program memory (12) unit, a direct memory access controller unit (13) and a programmable interruption control unit (15); all of them are connected to a general line (16) of entry/exit. The system allows to transfer data from the memory (7) towards the memory (12) of the controller (2), while data are being transmitted from or towards such memory (7). (Machine-translation by Google Translate, not legally binding)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US6226279A | 1979-07-30 | 1979-07-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
ES493786A0 ES493786A0 (en) | 1981-04-01 |
ES8104593A1 true ES8104593A1 (en) | 1981-04-01 |
Family
ID=22041308
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES493786A Expired ES8104593A1 (en) | 1979-07-30 | 1980-07-29 | Cycle steal mechanism |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPS5820061B2 (en) |
AU (1) | AU534605B2 (en) |
BR (1) | BR8004730A (en) |
CA (1) | CA1149070A (en) |
ES (1) | ES8104593A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01116846U (en) * | 1988-02-01 | 1989-08-07 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53108732A (en) * | 1977-03-04 | 1978-09-21 | Hitachi Ltd | Direct memory access system |
JPS581811B2 (en) * | 1977-11-04 | 1983-01-13 | 富士通株式会社 | Direct memory access control method |
JPS54127235A (en) * | 1978-03-27 | 1979-10-03 | Toshiba Corp | Direct memory access unit |
JPS5549728A (en) * | 1978-10-04 | 1980-04-10 | Hitachi Ltd | Data transfer system |
-
1980
- 1980-05-21 CA CA000352402A patent/CA1149070A/en not_active Expired
- 1980-06-05 AU AU59081/80A patent/AU534605B2/en not_active Ceased
- 1980-07-04 JP JP55090790A patent/JPS5820061B2/en not_active Expired
- 1980-07-29 ES ES493786A patent/ES8104593A1/en not_active Expired
- 1980-07-29 BR BR8004730A patent/BR8004730A/en unknown
Also Published As
Publication number | Publication date |
---|---|
BR8004730A (en) | 1981-02-10 |
ES493786A0 (en) | 1981-04-01 |
JPS5621223A (en) | 1981-02-27 |
AU534605B2 (en) | 1984-02-09 |
CA1149070A (en) | 1983-06-28 |
AU5908180A (en) | 1981-02-05 |
JPS5820061B2 (en) | 1983-04-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
ES455335A1 (en) | Shared direct memory access controller | |
JPS5580164A (en) | Main memory constitution control system | |
ES487281A1 (en) | A data processing system arranged for controlling the transfer of data between a central processing unit and a storage device thereof. | |
ES323100A1 (en) | Terminal device for use in multiple data processing systems. (Machine-translation by Google Translate, not legally binding) | |
ES485179A1 (en) | Virtual memory computer system. | |
JPS52119832A (en) | Electroinc calculator of microprogram control system | |
KR830010423A (en) | Data exchange method of data processing system | |
JPS5435645A (en) | Input/output control system for real-time data | |
ES8104593A1 (en) | Cycle steal mechanism | |
ES8104594A1 (en) | Input*output control unit | |
JPS56116138A (en) | Input and output controller | |
ES445531A1 (en) | Arrangement for controlling a signal switching system and a method for using this arrangement | |
JPS5640391A (en) | Multiprocessor control system | |
JPS5429534A (en) | Adding system of optional functions to composite terminal | |
JPS57105019A (en) | Data transfer controlling system | |
JPS57136239A (en) | Device address switching system | |
JPS5482946A (en) | Duplex system of sequence controller | |
JPS542636A (en) | Control system for plural number of input-output devices | |
JPS57176415A (en) | Sequence controller | |
JPS564826A (en) | Electronic computer | |
JPS53120350A (en) | Computer for process control | |
SE7907217L (en) | COMPUTER IN / OUTDOOR CONTROL DEVICE | |
JPS54145448A (en) | Input-output control ststem | |
JPS55150032A (en) | Data transfer system | |
JPS52125240A (en) | Data arrangement control system |