ES467570A1 - Pulse width indicating circuit - Google Patents

Abstract

A circuit for representing the pulse width, in digital form, of a sequence of pulses having a variable mark-to-space ratio, counting those periods of a fixed frequency, which is a first clock signal, by means of a counter, which take place within the measurement period, determined by a second clock signal, during the width of the pulse to be represented, characterized by a first and gate whose first input and second input are fed with the pulse sequence and the second clock signal, respectively, an up counter that has its account input connected to the output of the first gate -and, a memory that has its write inputs connected to the counter outputs upward, a preselective down counter that has its account entry connected to the output of the first and gate, and its preset entries to the memory outputs, a conversion register whose clock input and its serial information input are fed with the first clock signal and the second clock signal, respectively, and having the output of its second stage connected to the counter preselection activation input down, and the output from one of its next higher stages to the counter reset input up a control circuit for a successive count margin, which is symmetric around the zero count, down counter, and a second gate-and that it has its first input connected to the output of the first stage of the conversion register, its second input to the output of the control circuit, and its output to the memory write activation input. (Machine-translation by Google Translate, not legally binding)