ES319506A1 - Subordination device in phase of a signal supplied by a clock. (Machine-translation by Google Translate, not legally binding) - Google Patents

Subordination device in phase of a signal supplied by a clock. (Machine-translation by Google Translate, not legally binding)

Info

Publication number
ES319506A1
ES319506A1 ES0319506A ES319506A ES319506A1 ES 319506 A1 ES319506 A1 ES 319506A1 ES 0319506 A ES0319506 A ES 0319506A ES 319506 A ES319506 A ES 319506A ES 319506 A1 ES319506 A1 ES 319506A1
Authority
ES
Spain
Prior art keywords
clock
phase
gates
subordination
translation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES0319506A
Other languages
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Compagnie Francaise Thomson Houston SA
Original Assignee
Compagnie Francaise Thomson Houston SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Compagnie Francaise Thomson Houston SA filed Critical Compagnie Francaise Thomson Houston SA
Publication of ES319506A1 publication Critical patent/ES319506A1/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0992—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00286—Phase shifter, i.e. the delay between the output and input pulse is dependent on the frequency, and such that a phase difference is obtained independent of the frequency

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
  • Invalid Beds And Related Equipment (AREA)
  • Bridges Or Land Bridges (AREA)

Abstract

Subjection device in phase of a signal supplied by a clock, characterized in that the subordination device includes a clock, constituted by an oscillator and by frequency division circuits arranged in series that define harmonic periods of the period of the clock signal, combined with a differentiating circuit and with electronic "Y" gates; the differentiating circuit supplies pulses, which correspond to the transitions of a synchronization signal applied to the input, which commands, in conjunction with the output signals of the frequency divider circuits, the electronic "Y" gates; the impulses supplied by these "AND" gates are applied to the frequency divider circuits by modifying, in one or several times, the phase of the output signal of equal values to the fraction (see formula) at a multiple of this value, n representing the division factor of these frequency divider circuits, in a sense that reduces the lag that exists between the input and output signals at a value acceptable for use. (Machine-translation by Google Translate, not legally binding)
ES0319506A 1964-11-13 1965-11-12 Subordination device in phase of a signal supplied by a clock. (Machine-translation by Google Translate, not legally binding) Expired ES319506A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR994962A FR1422959A (en) 1964-11-13 1964-11-13 Improvements to phase control devices

Publications (1)

Publication Number Publication Date
ES319506A1 true ES319506A1 (en) 1966-01-16

Family

ID=8842504

Family Applications (1)

Application Number Title Priority Date Filing Date
ES0319506A Expired ES319506A1 (en) 1964-11-13 1965-11-12 Subordination device in phase of a signal supplied by a clock. (Machine-translation by Google Translate, not legally binding)

Country Status (10)

Country Link
AT (1) AT283449B (en)
BE (1) BE671417A (en)
DE (1) DE1292183B (en)
ES (1) ES319506A1 (en)
FR (1) FR1422959A (en)
GB (1) GB1122790A (en)
NL (1) NL6514697A (en)
NO (1) NO115586B (en)
OA (1) OA01855A (en)
SE (1) SE317707B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2213680C3 (en) * 1972-03-21 1974-08-15 Siemens Ag, 1000 Berlin Und 8000 Muenchen Method for adjusting the phase positions of a reference carrier and a step act
FR2458181A1 (en) * 1979-06-01 1980-12-26 Thomson Csf CLOCK SIGNAL SYNCHRONIZATION DEVICE AND SYNCHRONOUS DATA TRANSMISSION SYSTEMS INCLUDING SUCH A DEVICE
FR2459585A1 (en) * 1979-06-20 1981-01-09 Thomson Csf METHOD AND DEVICE FOR REFINING THE PHASE RELEASE OF A LOCAL CLOCK
NL8000607A (en) * 1980-01-31 1981-09-01 Philips Nv FM RECEIVER WITH TRANSMITTER CHARACTERIZATION.
NL183214C (en) * 1980-01-31 1988-08-16 Philips Nv Apparatus for synchronizing the phase of a locally generated clock signal with the phase of an input signal.
FR2601534B1 (en) * 1986-07-10 1993-07-30 Cit Alcatel METHOD AND DEVICE FOR PHASE TIMING OF SYNCHRONOUS DIGITAL TRAINS

Also Published As

Publication number Publication date
GB1122790A (en) 1968-08-07
OA01855A (en) 1970-01-14
DE1292183B (en) 1969-04-10
FR1422959A (en) 1966-01-03
SE317707B (en) 1969-11-24
AT283449B (en) 1970-08-10
BE671417A (en) 1966-04-26
NO115586B (en) 1968-10-28
NL6514697A (en) 1966-05-16

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