ES384149A1 - Un dispositivo semiconductor que tiene una pelicula protec-tora que cubre un extremo opuesto de una union positiva ne- gativa. - Google Patents
Un dispositivo semiconductor que tiene una pelicula protec-tora que cubre un extremo opuesto de una union positiva ne- gativa.Info
- Publication number
- ES384149A1 ES384149A1 ES384149A ES384149A ES384149A1 ES 384149 A1 ES384149 A1 ES 384149A1 ES 384149 A ES384149 A ES 384149A ES 384149 A ES384149 A ES 384149A ES 384149 A1 ES384149 A1 ES 384149A1
- Authority
- ES
- Spain
- Prior art keywords
- semiconductor device
- junction
- exposed
- substrate
- phosphorus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 239000000758 substrate Substances 0.000 abstract 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 abstract 1
- 229910052785 arsenic Inorganic materials 0.000 abstract 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 abstract 1
- 229910052698 phosphorus Inorganic materials 0.000 abstract 1
- 239000011574 phosphorus Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/043—Dual dielectric
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/118—Oxide films
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Formation Of Insulating Films (AREA)
- Thyristors (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2537370A JPS4926474B1 (es) | 1970-03-27 | 1970-03-27 | |
JP5433570A JPS4926750B1 (es) | 1970-06-24 | 1970-06-24 |
Publications (1)
Publication Number | Publication Date |
---|---|
ES384149A1 true ES384149A1 (es) | 1973-06-01 |
Family
ID=26362969
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES384149A Expired ES384149A1 (es) | 1970-03-27 | 1970-09-30 | Un dispositivo semiconductor que tiene una pelicula protec-tora que cubre un extremo opuesto de una union positiva ne- gativa. |
Country Status (6)
Country | Link |
---|---|
US (1) | US3694707A (es) |
DE (1) | DE2048201B2 (es) |
ES (1) | ES384149A1 (es) |
FR (1) | FR2083799A5 (es) |
GB (1) | GB1272033A (es) |
NL (1) | NL163903C (es) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2326314C2 (de) * | 1973-05-23 | 1983-10-27 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur Herstellung von Reliefstrukturen |
JPS55108763A (en) | 1979-01-24 | 1980-08-21 | Toshiba Corp | Schottky barrier compound semiconductor device |
DE3213988A1 (de) * | 1982-04-16 | 1983-10-20 | L. & C. Steinmüller GmbH, 5270 Gummersbach | Verfahren zur reinigung von gasdurchstroemten waermetauschern |
US5045918A (en) * | 1986-12-19 | 1991-09-03 | North American Philips Corp. | Semiconductor device with reduced packaging stress |
US5171716A (en) * | 1986-12-19 | 1992-12-15 | North American Philips Corp. | Method of manufacturing semiconductor device with reduced packaging stress |
US5068205A (en) * | 1989-05-26 | 1991-11-26 | General Signal Corporation | Header mounted chemically sensitive ISFET and method of manufacture |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1544318C3 (de) * | 1965-10-16 | 1973-10-31 | Telefunken Patentverwertungs Gmbh, 7900 Ulm | Verfahren zum Erzeugen dotierter Zonen in Halbleiterkörpern |
US3455020A (en) * | 1966-10-13 | 1969-07-15 | Rca Corp | Method of fabricating insulated-gate field-effect devices |
US3485684A (en) * | 1967-03-30 | 1969-12-23 | Trw Semiconductors Inc | Dislocation enhancement control of silicon by introduction of large diameter atomic metals |
-
1970
- 1970-09-29 US US76582A patent/US3694707A/en not_active Expired - Lifetime
- 1970-09-29 FR FR7035170A patent/FR2083799A5/fr not_active Expired
- 1970-09-30 GB GB46412/70A patent/GB1272033A/en not_active Expired
- 1970-09-30 NL NL7014340.A patent/NL163903C/xx not_active IP Right Cessation
- 1970-09-30 DE DE19702048201 patent/DE2048201B2/de not_active Ceased
- 1970-09-30 ES ES384149A patent/ES384149A1/es not_active Expired
Also Published As
Publication number | Publication date |
---|---|
NL163903B (nl) | 1980-05-16 |
DE2048201B2 (de) | 1976-08-05 |
FR2083799A5 (es) | 1971-12-17 |
DE2048201A1 (de) | 1971-10-14 |
US3694707A (en) | 1972-09-26 |
GB1272033A (en) | 1972-04-26 |
NL163903C (nl) | 1980-10-15 |
NL7014340A (es) | 1971-09-29 |
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