ES2804604T3 - Técnicas de ahorro de energía para sistemas de memoria - Google Patents

Técnicas de ahorro de energía para sistemas de memoria Download PDF

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Publication number
ES2804604T3
ES2804604T3 ES17711926T ES17711926T ES2804604T3 ES 2804604 T3 ES2804604 T3 ES 2804604T3 ES 17711926 T ES17711926 T ES 17711926T ES 17711926 T ES17711926 T ES 17711926T ES 2804604 T3 ES2804604 T3 ES 2804604T3
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ES
Spain
Prior art keywords
data
memory
lanes
command
central processor
Prior art date
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Active
Application number
ES17711926T
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English (en)
Spanish (es)
Inventor
Jungwon Suh
Dexter Chun
Michael Lo
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Qualcomm Inc
Original Assignee
Qualcomm Inc
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Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
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Publication of ES2804604T3 publication Critical patent/ES2804604T3/es
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/325Power saving in peripheral device
    • G06F1/3275Power saving in memory, e.g. RAM, cache
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215Monitoring of peripheral devices
    • G06F1/3225Monitoring of peripheral devices of memory devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/325Power saving in peripheral device
    • G06F1/3278Power saving in modem or I/O interface
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1673Details of memory controller using buffers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0608Saving storage space on storage systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0625Power saving in storage systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659Command handling arrangements, e.g. command buffers, queues, command scheduling
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10Aspects relating to interfaces of memory device to external buses
    • G11C2207/102Compression or decompression of data before storage
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
  • Bus Control (AREA)
  • Power Sources (AREA)
ES17711926T 2016-03-03 2017-03-03 Técnicas de ahorro de energía para sistemas de memoria Active ES2804604T3 (es)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201662302891P 2016-03-03 2016-03-03
US15/448,327 US10222853B2 (en) 2016-03-03 2017-03-02 Power saving techniques for memory systems by consolidating data in data lanes of a memory bus
PCT/US2017/020582 WO2017152005A1 (en) 2016-03-03 2017-03-03 Power saving techniques for memory systems

Publications (1)

Publication Number Publication Date
ES2804604T3 true ES2804604T3 (es) 2021-02-08

Family

ID=59722700

Family Applications (1)

Application Number Title Priority Date Filing Date
ES17711926T Active ES2804604T3 (es) 2016-03-03 2017-03-03 Técnicas de ahorro de energía para sistemas de memoria

Country Status (9)

Country Link
US (2) US10222853B2 (enExample)
EP (1) EP3423947B1 (enExample)
JP (2) JP6999565B2 (enExample)
KR (1) KR102420909B1 (enExample)
CN (1) CN108701099B (enExample)
CA (1) CA3013090A1 (enExample)
ES (1) ES2804604T3 (enExample)
HU (1) HUE049615T2 (enExample)
WO (1) WO2017152005A1 (enExample)

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KR20190035392A (ko) * 2017-09-26 2019-04-03 삼성전자주식회사 데이터 다중 기록을 수행하는 메모리 장치, 메모리 장치의 동작방법 및 메모리 컨트롤러의 동작방법
KR102731057B1 (ko) * 2018-09-21 2024-11-15 삼성전자주식회사 메모리 장치와 통신하는 데이터 처리 장치 및 방법
KR20200071396A (ko) * 2018-12-11 2020-06-19 에스케이하이닉스 주식회사 반도체장치 및 반도체시스템
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US11899598B2 (en) * 2022-05-31 2024-02-13 Western Digital Technologies, Inc. Data storage device and method for lane selection based on thermal conditions
KR20240009813A (ko) 2022-07-14 2024-01-23 삼성전자주식회사 단일 직렬 쓰기 인터페이싱 방식을 지원하는 스토리지 모듈 및 그것의 동작 방법
US12356292B1 (en) 2023-07-21 2025-07-08 Wm Intellectual Property Holdings, L.L.C. Apparatus and method for asset tracking for metal waste and recycling containers
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Also Published As

Publication number Publication date
JP2019507436A (ja) 2019-03-14
US20170255394A1 (en) 2017-09-07
KR102420909B1 (ko) 2022-07-13
EP3423947A1 (en) 2019-01-09
KR20180119584A (ko) 2018-11-02
CN108701099A (zh) 2018-10-23
US20190179399A1 (en) 2019-06-13
JP7417576B2 (ja) 2024-01-18
JP6999565B2 (ja) 2022-01-18
US10222853B2 (en) 2019-03-05
CN108701099B (zh) 2022-05-03
CA3013090A1 (en) 2017-09-08
HUE049615T2 (hu) 2020-09-28
WO2017152005A1 (en) 2017-09-08
EP3423947B1 (en) 2020-04-22
US10852809B2 (en) 2020-12-01
JP2022040150A (ja) 2022-03-10
BR112018067531A2 (pt) 2019-01-02

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