CN108701099B - 用于存储器系统的功率节省技术 - Google Patents

用于存储器系统的功率节省技术 Download PDF

Info

Publication number
CN108701099B
CN108701099B CN201780013577.8A CN201780013577A CN108701099B CN 108701099 B CN108701099 B CN 108701099B CN 201780013577 A CN201780013577 A CN 201780013577A CN 108701099 B CN108701099 B CN 108701099B
Authority
CN
China
Prior art keywords
data
memory
host processor
command
memory controller
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201780013577.8A
Other languages
English (en)
Chinese (zh)
Other versions
CN108701099A (zh
Inventor
J·徐
D·T·全
M·H·洛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of CN108701099A publication Critical patent/CN108701099A/zh
Application granted granted Critical
Publication of CN108701099B publication Critical patent/CN108701099B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/325Power saving in peripheral device
    • G06F1/3275Power saving in memory, e.g. RAM, cache
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215Monitoring of peripheral devices
    • G06F1/3225Monitoring of peripheral devices of memory devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/325Power saving in peripheral device
    • G06F1/3278Power saving in modem or I/O interface
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1673Details of memory controller using buffers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0608Saving storage space on storage systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0625Power saving in storage systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659Command handling arrangements, e.g. command buffers, queues, command scheduling
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10Aspects relating to interfaces of memory device to external buses
    • G11C2207/102Compression or decompression of data before storage
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
  • Bus Control (AREA)
  • Power Sources (AREA)
CN201780013577.8A 2016-03-03 2017-03-03 用于存储器系统的功率节省技术 Active CN108701099B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201662302891P 2016-03-03 2016-03-03
US62/302,891 2016-03-03
US15/448,327 2017-03-02
US15/448,327 US10222853B2 (en) 2016-03-03 2017-03-02 Power saving techniques for memory systems by consolidating data in data lanes of a memory bus
PCT/US2017/020582 WO2017152005A1 (en) 2016-03-03 2017-03-03 Power saving techniques for memory systems

Publications (2)

Publication Number Publication Date
CN108701099A CN108701099A (zh) 2018-10-23
CN108701099B true CN108701099B (zh) 2022-05-03

Family

ID=59722700

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201780013577.8A Active CN108701099B (zh) 2016-03-03 2017-03-03 用于存储器系统的功率节省技术

Country Status (9)

Country Link
US (2) US10222853B2 (enExample)
EP (1) EP3423947B1 (enExample)
JP (2) JP6999565B2 (enExample)
KR (1) KR102420909B1 (enExample)
CN (1) CN108701099B (enExample)
CA (1) CA3013090A1 (enExample)
ES (1) ES2804604T3 (enExample)
HU (1) HUE049615T2 (enExample)
WO (1) WO2017152005A1 (enExample)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10222853B2 (en) 2016-03-03 2019-03-05 Qualcomm Incorporated Power saving techniques for memory systems by consolidating data in data lanes of a memory bus
US10394724B2 (en) * 2016-08-22 2019-08-27 Qualcomm Incorporated Low power data transfer for memory subsystem using data pattern checker to determine when to suppress transfers based on specific patterns
KR20190035392A (ko) * 2017-09-26 2019-04-03 삼성전자주식회사 데이터 다중 기록을 수행하는 메모리 장치, 메모리 장치의 동작방법 및 메모리 컨트롤러의 동작방법
KR102731057B1 (ko) * 2018-09-21 2024-11-15 삼성전자주식회사 메모리 장치와 통신하는 데이터 처리 장치 및 방법
KR20200071396A (ko) * 2018-12-11 2020-06-19 에스케이하이닉스 주식회사 반도체장치 및 반도체시스템
KR102698036B1 (ko) * 2019-04-10 2024-08-22 에스케이하이닉스 주식회사 반도체장치
US12061793B1 (en) * 2020-11-25 2024-08-13 Astera Labs, Inc. Capacity-expanding memory control component
US11722152B1 (en) 2020-11-25 2023-08-08 Astera Labs, Inc. Capacity-expanding memory control component
KR20220135504A (ko) 2021-03-30 2022-10-07 삼성전자주식회사 데이터 처리 시스템 및 데이터 처리 장치의 동작 방법
US11785424B1 (en) 2021-06-28 2023-10-10 Wm Intellectual Property Holdings, L.L.C. System and method for asset tracking for waste and recycling containers
CN116264083B (zh) * 2021-12-14 2025-08-15 长鑫存储技术有限公司 存储系统以及存储系统的数据读取方法
CN116264085B (zh) * 2021-12-14 2025-08-15 长鑫存储技术有限公司 存储系统以及存储系统的数据写入方法
US20230197123A1 (en) * 2021-12-20 2023-06-22 Advanced Micro Devices, Inc. Method and apparatus for performing a simulated write operation
US11899598B2 (en) * 2022-05-31 2024-02-13 Western Digital Technologies, Inc. Data storage device and method for lane selection based on thermal conditions
KR20240009813A (ko) 2022-07-14 2024-01-23 삼성전자주식회사 단일 직렬 쓰기 인터페이싱 방식을 지원하는 스토리지 모듈 및 그것의 동작 방법
US12356292B1 (en) 2023-07-21 2025-07-08 Wm Intellectual Property Holdings, L.L.C. Apparatus and method for asset tracking for metal waste and recycling containers
US12277350B1 (en) 2023-10-30 2025-04-15 Astera Labs, Inc. Virtual metadata storage

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6009026A (en) * 1997-07-28 1999-12-28 International Business Machines Corporation Compressed input/output test mode
CN103714026A (zh) * 2014-01-14 2014-04-09 中国人民解放军国防科学技术大学 一种支持原址数据交换的存储器访问方法及装置
WO2014209399A1 (en) * 2013-06-28 2014-12-31 Hewlett-Packard Development Company, L.P. Memory component capable to communicate at multiple data widths

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7190284B1 (en) * 1994-11-16 2007-03-13 Dye Thomas A Selective lossless, lossy, or no compression of data based on address range, data type, and/or requesting agent
JPH1011360A (ja) * 1996-06-24 1998-01-16 Toshiba Corp キャッシュメモリ
JP2921505B2 (ja) * 1996-08-09 1999-07-19 日本電気株式会社 半導体記憶装置
US6145069A (en) * 1999-01-29 2000-11-07 Interactive Silicon, Inc. Parallel decompression and compression system and method for improving storage density and access speed for non-volatile memory and embedded memory devices
US6785793B2 (en) 2001-09-27 2004-08-31 Intel Corporation Method and apparatus for memory access scheduling to reduce memory access latency
US7383399B2 (en) * 2004-06-30 2008-06-03 Intel Corporation Method and apparatus for memory compression
US7631207B1 (en) * 2006-04-21 2009-12-08 Sun Microsystems, Inc. Reducing power consumption for processing of common values in microprocessor registers and execution units
GB2457667B (en) 2008-02-19 2012-01-11 Advanced Risc Mach Ltd Data transfer between devices within an integrated circuit
US8694703B2 (en) * 2010-06-09 2014-04-08 Brocade Communications Systems, Inc. Hardware-accelerated lossless data compression
RU2556443C2 (ru) 2010-09-16 2015-07-10 Эппл Инк. Многопортовый контроллер запоминающего устройства с портами, ассоциированными с классами трафика
KR101854251B1 (ko) 2010-11-30 2018-05-03 삼성전자주식회사 멀티 채널 반도체 메모리 장치 및 그를 구비하는 반도체 장치
US9189394B2 (en) * 2012-08-08 2015-11-17 Wisconsin Alumni Research Foundation Memory-link compression for graphic processor unit
JP2014053058A (ja) * 2012-09-06 2014-03-20 Toshiba Corp 半導体記憶装置
US9430434B2 (en) 2013-09-20 2016-08-30 Qualcomm Incorporated System and method for conserving memory power using dynamic memory I/O resizing
US9568542B2 (en) * 2013-09-25 2017-02-14 Cavium, Inc. Memory interface with integrated tester
US20150121111A1 (en) * 2013-10-24 2015-04-30 Qualcomm Incorporated System and method for providing multi-user power saving codebook optmization
US9864536B2 (en) * 2013-10-24 2018-01-09 Qualcomm Incorporated System and method for conserving power consumption in a memory system
US9563251B2 (en) 2013-12-28 2017-02-07 Intel Corporation Representing a cache line bit pattern via meta signaling
KR102017808B1 (ko) 2013-12-31 2019-09-03 에스케이하이닉스 주식회사 데이터 처리 장치 및 데이터 처리 방법
CA2986559A1 (en) * 2015-05-21 2016-11-24 Zeropoint Technologies Ab Methods, devices and systems for semantic-value data compression and decompression
US20170115900A1 (en) * 2015-10-23 2017-04-27 International Business Machines Corporation Dummy page insertion for flexible page retirement in flash memory storing multiple bits per memory cell
US10222853B2 (en) 2016-03-03 2019-03-05 Qualcomm Incorporated Power saving techniques for memory systems by consolidating data in data lanes of a memory bus
US10394724B2 (en) * 2016-08-22 2019-08-27 Qualcomm Incorporated Low power data transfer for memory subsystem using data pattern checker to determine when to suppress transfers based on specific patterns

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6009026A (en) * 1997-07-28 1999-12-28 International Business Machines Corporation Compressed input/output test mode
WO2014209399A1 (en) * 2013-06-28 2014-12-31 Hewlett-Packard Development Company, L.P. Memory component capable to communicate at multiple data widths
CN103714026A (zh) * 2014-01-14 2014-04-09 中国人民解放军国防科学技术大学 一种支持原址数据交换的存储器访问方法及装置

Also Published As

Publication number Publication date
JP2019507436A (ja) 2019-03-14
US20170255394A1 (en) 2017-09-07
KR102420909B1 (ko) 2022-07-13
ES2804604T3 (es) 2021-02-08
EP3423947A1 (en) 2019-01-09
KR20180119584A (ko) 2018-11-02
CN108701099A (zh) 2018-10-23
US20190179399A1 (en) 2019-06-13
JP7417576B2 (ja) 2024-01-18
JP6999565B2 (ja) 2022-01-18
US10222853B2 (en) 2019-03-05
CA3013090A1 (en) 2017-09-08
HUE049615T2 (hu) 2020-09-28
WO2017152005A1 (en) 2017-09-08
EP3423947B1 (en) 2020-04-22
US10852809B2 (en) 2020-12-01
JP2022040150A (ja) 2022-03-10
BR112018067531A2 (pt) 2019-01-02

Similar Documents

Publication Publication Date Title
CN108701099B (zh) 用于存储器系统的功率节省技术
US10592121B2 (en) Quasi-synchronous protocol for large bandwidth memory systems
JP6983313B2 (ja) 不揮発性メモリの書込みクレジットの管理
EP2791809B1 (en) Unified data masking, data poisoning, and data bus inversion signaling
US11650765B2 (en) Apparatus and method for performing persistent write operations using a persistent write command
KR20130119545A (ko) 메모리 장치, 메모리 컨트롤러, 메모리 시스템 및 이의 동작 방법
KR20190019209A (ko) Ddr 메모리 에러 복구
US10503435B2 (en) Providing extended dynamic random access memory (DRAM) burst lengths in processor-based systems
CN110633229A (zh) 用于高带宽存储器通道的dimm
US20140177347A1 (en) Inter-row data transfer in memory devices
KR20200055805A (ko) 다수의 레이턴시 집합을 이용하는 메모리 디바이스 및 이의 작동 방법
JP2020184338A (ja) 高帯域幅メモリ及びその動作方法並びに高帯域幅メモリシステム
CN110720126B (zh) 传输数据掩码的方法、内存控制器、内存芯片和计算机系统
US20240004583A1 (en) Protocol for data poisoning
CN106940684B (zh) 一种按比特写数据的方法及装置
CN118430627A (zh) 用于同步命令起始点(csp)的存储器设备和方法
US12047302B2 (en) Data encoding and packet sharing in a parallel communication interface
BR112018067531B1 (pt) Processador hospedeiro e sistema de memória

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant