ES2287345T3 - Estacion de base que tiene una interfaz de bus serie/paralelo hibrida. - Google Patents

Estacion de base que tiene una interfaz de bus serie/paralelo hibrida. Download PDF

Info

Publication number
ES2287345T3
ES2287345T3 ES02789755T ES02789755T ES2287345T3 ES 2287345 T3 ES2287345 T3 ES 2287345T3 ES 02789755 T ES02789755 T ES 02789755T ES 02789755 T ES02789755 T ES 02789755T ES 2287345 T3 ES2287345 T3 ES 2287345T3
Authority
ES
Spain
Prior art keywords
data
block
bits
sets
lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES02789755T
Other languages
English (en)
Spanish (es)
Inventor
Joseph Gredone
Alfred Stufflet
Timothy A. Axness
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
InterDigital Technology Corp
Original Assignee
InterDigital Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/990,060 external-priority patent/US7069464B2/en
Application filed by InterDigital Technology Corp filed Critical InterDigital Technology Corp
Application granted granted Critical
Publication of ES2287345T3 publication Critical patent/ES2287345T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Traffic Control Systems (AREA)
  • Train Traffic Observation, Control, And Security (AREA)
  • Dc Digital Transmission (AREA)
  • Small-Scale Networks (AREA)
ES02789755T 2001-11-21 2002-11-19 Estacion de base que tiene una interfaz de bus serie/paralelo hibrida. Expired - Lifetime ES2287345T3 (es)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US990060 2001-11-21
US09/990,060 US7069464B2 (en) 2001-11-21 2001-11-21 Hybrid parallel/serial bus interface
US81466 2002-02-22
US10/081,466 US6829718B2 (en) 2001-11-21 2002-02-22 Base station having a hybrid parallel/serial bus interface

Publications (1)

Publication Number Publication Date
ES2287345T3 true ES2287345T3 (es) 2007-12-16

Family

ID=26765598

Family Applications (1)

Application Number Title Priority Date Filing Date
ES02789755T Expired - Lifetime ES2287345T3 (es) 2001-11-21 2002-11-19 Estacion de base que tiene una interfaz de bus serie/paralelo hibrida.

Country Status (13)

Country Link
EP (1) EP1446584B1 (no)
JP (2) JP4142584B2 (no)
CN (1) CN1332328C (no)
AT (1) ATE367681T1 (no)
AU (1) AU2002352801A1 (no)
CA (1) CA2467632A1 (no)
DE (1) DE60221270T2 (no)
ES (1) ES2287345T3 (no)
HK (1) HK1073701A1 (no)
MX (1) MXPA04004790A (no)
NO (1) NO20042541L (no)
TW (1) TWI267274B (no)
WO (1) WO2003046391A2 (no)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4546416B2 (ja) * 2006-04-24 2010-09-15 ザインエレクトロニクス株式会社 画像信号受信装置
CN105242591B (zh) * 2015-08-17 2017-12-12 合肥宝龙达信息技术有限公司 一种输入输出接口合并系统
CN108736897B (zh) * 2018-04-26 2022-08-09 深圳市国微电子有限公司 应用于高速接口物理层芯片的并串转换电路及装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2822815B2 (ja) * 1992-09-30 1998-11-11 日本電気株式会社 基地局間信号伝送方式
US5602780A (en) * 1993-10-20 1997-02-11 Texas Instruments Incorporated Serial to parallel and parallel to serial architecture for a RAM based FIFO memory
KR100186229B1 (ko) * 1995-12-08 1999-05-15 김광호 타임스위칭 및 회의통화 기능 통합 구현장치
US5812881A (en) * 1997-04-10 1998-09-22 International Business Machines Corporation Handshake minimizing serial to parallel bus interface in a data processing system
JP2001136156A (ja) * 1999-11-08 2001-05-18 Toshiba Digital Media Engineering Corp データ伝送速度変換回路

Also Published As

Publication number Publication date
EP1446584B1 (en) 2007-07-18
ATE367681T1 (de) 2007-08-15
TW200303673A (en) 2003-09-01
DE60221270D1 (de) 2007-08-30
JP4142584B2 (ja) 2008-09-03
CN1610891A (zh) 2005-04-27
CN1332328C (zh) 2007-08-15
NO20042541L (no) 2004-07-26
WO2003046391A3 (en) 2003-10-09
AU2002352801A1 (en) 2003-06-10
JP2005510915A (ja) 2005-04-21
MXPA04004790A (es) 2004-08-11
WO2003046391A2 (en) 2003-06-05
DE60221270T2 (de) 2008-04-10
EP1446584A4 (en) 2005-05-11
EP1446584A2 (en) 2004-08-18
JP2008011577A (ja) 2008-01-17
TWI267274B (en) 2006-11-21
CA2467632A1 (en) 2003-06-05
HK1073701A1 (en) 2005-10-14
AU2002352801A8 (en) 2003-06-10

Similar Documents

Publication Publication Date Title
ES2287339T3 (es) Interfaz de bus serie/paralelo hibrida.
ES2287360T3 (es) Metodo empleado por una estacion de base para transferir datos.
ES2287345T3 (es) Estacion de base que tiene una interfaz de bus serie/paralelo hibrida.
CA2467841C (en) User equipment (ue) having a hybrid parallel/serial bus interface
EP1446887A1 (en) Method of transferring data