ES2171757T3 - Procedimiento de dopado para producir homouniones en sustratos de semiconductores. - Google Patents
Procedimiento de dopado para producir homouniones en sustratos de semiconductores.Info
- Publication number
- ES2171757T3 ES2171757T3 ES96943845T ES96943845T ES2171757T3 ES 2171757 T3 ES2171757 T3 ES 2171757T3 ES 96943845 T ES96943845 T ES 96943845T ES 96943845 T ES96943845 T ES 96943845T ES 2171757 T3 ES2171757 T3 ES 2171757T3
- Authority
- ES
- Spain
- Prior art keywords
- homounions
- produce
- semiconductor substrates
- doping procedure
- mask
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title abstract 4
- 239000000758 substrate Substances 0.000 title abstract 4
- 238000000034 method Methods 0.000 title abstract 2
- 239000002019 doping agent Substances 0.000 abstract 2
- 238000009792 diffusion process Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
- H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/037—Diffusion-deposition
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/038—Diffusions-staged
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12014—All metal or with adjacent metals having metal particles
- Y10T428/12028—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, etc.]
- Y10T428/12063—Nonparticulate metal component
- Y10T428/12104—Particles discontinuous
- Y10T428/12111—Separated by nonmetal matrix or binder [e.g., welding electrode, etc.]
- Y10T428/12125—Nonparticulate component has Fe-base
- Y10T428/12132—Next to Fe-containing particles
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Photovoltaic Devices (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Led Devices (AREA)
Abstract
LA INVENCION DESCRIBE UN METODO DE IMPURIFICACION PARA FABRICAR HOMOUNIONES EN SUSTRATOS DE SEMICONDUCTORES EN LOS QUE LAS SUSTANCIAS DE IMPURIFICACION PENETRAN POR DIFUSION, QUE INCLUYE UNA FUENTE LUMINOSA CUYO ESPECTRO DE EMISION CONTIENE COMPONENTES ULTRAVIOLETAS Y QUE INCIDE SOBRE LA SUPERFICIE DEL SUSTRATO DE SEMICONDUCTOR. LA INVENCION SE CARACTERIZA PORQUE ENTRE EL SUSTRATO DE SEMICONDUCTOR A IMPURIFICAR Y LA FUENTE LUMINOSA SE INTRODUCE UNA MASCARA QUE, DEPENDIENDO DE LAS ZONAS A IMPURIFICAR CON SIMILAR CONCENTRACION DE IMPUREZAS, PRESENTA AREAS DE GROSOR VARIABLE HASTA LOS ORIFICIOS DE PASO DE LA MISMA; ENTRE LA MASCARA Y EL SUSTRATO DE SEMICONDUCTOR A IMPURIFICAR SE INSERTAN ATOMOS DE IMPUREZAS; Y PARA INTRODUCIR LAS IMPUREZAS POR DIFUSION EN EL SUSTRATO DE SEMICONDUCTOR SE ILUMINA LA SUPERFICIE DE LA MASCARA CON LA FUENTE LUMINOSA UTILIZANDO RAPID THERMAL PROCESSING (TRATAMIENTO TERMICO RAPIDO).
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19534574A DE19534574C2 (de) | 1995-09-18 | 1995-09-18 | Dotierverfahren zur Herstellung von Homoübergängen in Halbleitersubstraten |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2171757T3 true ES2171757T3 (es) | 2002-09-16 |
Family
ID=7772477
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES96943845T Expired - Lifetime ES2171757T3 (es) | 1995-09-18 | 1996-08-28 | Procedimiento de dopado para producir homouniones en sustratos de semiconductores. |
Country Status (7)
Country | Link |
---|---|
US (1) | US6232207B1 (es) |
EP (1) | EP0852062B1 (es) |
JP (1) | JPH11512566A (es) |
AT (1) | ATE213093T1 (es) |
DE (2) | DE19534574C2 (es) |
ES (1) | ES2171757T3 (es) |
WO (1) | WO1997011481A2 (es) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100273318B1 (ko) * | 1998-11-04 | 2001-01-15 | 김영환 | 반도체 기판의 열처리 장치 및 열처리 방법 |
DE10018371B4 (de) * | 2000-04-13 | 2005-07-21 | Infineon Technologies Ag | Verfahren zum Herstellen eines Halbleitersubstrats |
DE10141352A1 (de) * | 2001-08-23 | 2003-06-05 | Osram Opto Semiconductors Gmbh | Verfahren zur Oberflächenbehandlung eines Halbleiters |
DE102005032807A1 (de) * | 2005-07-12 | 2007-01-18 | Merck Patent Gmbh | Kombinierte Ätz- und Dotiermedien für Siliziumdioxidschichten und darunter liegendes Silizium |
JP5276994B2 (ja) * | 2006-02-28 | 2013-08-28 | チバ ホールディング インコーポレーテッド | 抗菌剤化合物 |
WO2007128141A1 (de) * | 2006-05-04 | 2007-11-15 | Elektrobit Wireless Communications Ltd. | Verfahren zur inbetriebnahme eines rfid-netzwerks |
US20090239363A1 (en) * | 2008-03-24 | 2009-09-24 | Honeywell International, Inc. | Methods for forming doped regions in semiconductor substrates using non-contact printing processes and dopant-comprising inks for forming such doped regions using non-contact printing processes |
DE102008019402A1 (de) * | 2008-04-14 | 2009-10-15 | Gebr. Schmid Gmbh & Co. | Verfahren zur selektiven Dotierung von Silizium sowie damit behandeltes Silizium-Substrat |
TW200945596A (en) * | 2008-04-16 | 2009-11-01 | Mosel Vitelic Inc | A method for making a solar cell with a selective emitter |
US8053867B2 (en) | 2008-08-20 | 2011-11-08 | Honeywell International Inc. | Phosphorous-comprising dopants and methods for forming phosphorous-doped regions in semiconductor substrates using phosphorous-comprising dopants |
US7951696B2 (en) | 2008-09-30 | 2011-05-31 | Honeywell International Inc. | Methods for simultaneously forming N-type and P-type doped regions using non-contact printing processes |
US8518170B2 (en) | 2008-12-29 | 2013-08-27 | Honeywell International Inc. | Boron-comprising inks for forming boron-doped regions in semiconductor substrates using non-contact printing processes and methods for fabricating such boron-comprising inks |
US7820532B2 (en) * | 2008-12-29 | 2010-10-26 | Honeywell International Inc. | Methods for simultaneously forming doped regions having different conductivity-determining type element profiles |
DE102009041546A1 (de) * | 2009-03-27 | 2010-10-14 | Bosch Solar Energy Ag | Verfahren zur Herstellung von Solarzellen mit selektivem Emitter |
US8324089B2 (en) | 2009-07-23 | 2012-12-04 | Honeywell International Inc. | Compositions for forming doped regions in semiconductor substrates, methods for fabricating such compositions, and methods for forming doped regions using such compositions |
IT1396367B1 (it) * | 2009-10-14 | 2012-11-19 | Italcementi Spa | Procedimento per la preparazione di biossido di titanio dopato con carbonio. |
US8629294B2 (en) | 2011-08-25 | 2014-01-14 | Honeywell International Inc. | Borate esters, boron-comprising dopants, and methods of fabricating boron-comprising dopants |
US8975170B2 (en) | 2011-10-24 | 2015-03-10 | Honeywell International Inc. | Dopant ink compositions for forming doped regions in semiconductor substrates, and methods for fabricating dopant ink compositions |
DE102012018746A1 (de) * | 2012-09-21 | 2014-03-27 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Verfahren zur Dotierung von Halbleitersubstraten |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4273950A (en) | 1979-05-29 | 1981-06-16 | Photowatt International, Inc. | Solar cell and fabrication thereof using microwaves |
GB2131608B (en) | 1982-11-26 | 1987-01-14 | Gen Electric Plc | Fabricating semiconductor circuits |
DE3402653A1 (de) | 1984-01-26 | 1985-08-01 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur herstellung speziell dotierter bereiche in halbleitermaterial |
US4619036A (en) * | 1984-09-28 | 1986-10-28 | Texas Instruments Incorporated | Self-aligned low-temperature emitter drive-in |
JPH06508957A (ja) * | 1990-10-02 | 1994-10-06 | ユニバーシティ オブ ヒューストン システム | 固体ドーパントソースと急速熱処理を使用してシリコンウェーハをドープする方法と装置 |
DE4223403C1 (de) | 1992-07-16 | 1993-12-09 | Fraunhofer Ges Forschung | Verfahren zur Erzeugung von strukturierten, dotierten Bereichen auf Festkörpern |
JP3562590B2 (ja) * | 1993-12-01 | 2004-09-08 | 株式会社半導体エネルギー研究所 | 半導体装置作製方法 |
US5510271A (en) * | 1994-09-09 | 1996-04-23 | Georgia Tech Research Corporation | Processes for producing low cost, high efficiency silicon solar cells |
-
1995
- 1995-09-18 DE DE19534574A patent/DE19534574C2/de not_active Expired - Fee Related
-
1996
- 1996-08-26 US US09/043,355 patent/US6232207B1/en not_active Expired - Fee Related
- 1996-08-28 EP EP96943845A patent/EP0852062B1/de not_active Expired - Lifetime
- 1996-08-28 DE DE59608710T patent/DE59608710D1/de not_active Expired - Fee Related
- 1996-08-28 AT AT96943845T patent/ATE213093T1/de not_active IP Right Cessation
- 1996-08-28 JP JP9512296A patent/JPH11512566A/ja not_active Withdrawn
- 1996-08-28 WO PCT/DE1996/001598 patent/WO1997011481A2/de active IP Right Grant
- 1996-08-28 ES ES96943845T patent/ES2171757T3/es not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE19534574A1 (de) | 1997-03-20 |
EP0852062A2 (de) | 1998-07-08 |
WO1997011481A3 (de) | 1997-05-09 |
US6232207B1 (en) | 2001-05-15 |
DE19534574C2 (de) | 1997-12-18 |
WO1997011481A2 (de) | 1997-03-27 |
EP0852062B1 (de) | 2002-02-06 |
DE59608710D1 (de) | 2002-03-21 |
ATE213093T1 (de) | 2002-02-15 |
JPH11512566A (ja) | 1999-10-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG2A | Definitive protection |
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