ES2170272T3 - Carcasa de matriz de protuberancias polimeras para sistemas de conexiones de microondas. - Google Patents
Carcasa de matriz de protuberancias polimeras para sistemas de conexiones de microondas.Info
- Publication number
- ES2170272T3 ES2170272T3 ES96934617T ES96934617T ES2170272T3 ES 2170272 T3 ES2170272 T3 ES 2170272T3 ES 96934617 T ES96934617 T ES 96934617T ES 96934617 T ES96934617 T ES 96934617T ES 2170272 T3 ES2170272 T3 ES 2170272T3
- Authority
- ES
- Spain
- Prior art keywords
- metal layer
- substrate
- studs
- pct
- polymer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/15165—Monolayer substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Structure Of Printed Boards (AREA)
- Injection Moulding Of Plastics Or The Like (AREA)
- Combinations Of Printed Boards (AREA)
- Waveguides (AREA)
- Fittings On The Vehicle Exterior For Carrying Loads, And Devices For Holding Or Mounting Articles (AREA)
- Casings For Electric Apparatus (AREA)
- Radar Systems Or Details Thereof (AREA)
Abstract
SE PROPONE UN DISPOSITIVO EN REJILLA DE TACOS POLIMERICOS PARA DISPOSICIONES DE CIRCUITOS DE MICROONDAS, CON UN SUSTRATO TRIDIMENSIONAL (S) DE FUNDICION INYECTADA A PARTIR DE UN POLIMERO ELECTRICAMENTE AISLANTE, TACOS POLIMERICOS (PS) DISPUESTOS SUPERFICIALMENTE SOBRE LA CARA INFERIOR DEL SUSTRATO (S) Y MOLDEADOS TAMBIEN DURANTE LA FUNDICION INYECTADA, CONEXIONES DE SEÑAL (SA) FORMADAS SOBRE VARIOS TACOS POLIMERICOS (PS) MEDIANTE UNA SUPERFICIE EXTREMA SOLDABLE, UNA CONEXION DE POTENCIA (PA) FORMADA SOBRE AL MENOS UN TACO POLIMERICO (PS) MEDIANTE UNA SUPERFICIE EXTREMA SOLDABLE, CONDUCTORES DE TIRA (SL) CONFORMADOS SOBRE LA CARA INFERIOR DEL SUSTRATO (S), QUE ESTAN FORMADOS POR UNA PRIMERA CAPA METALICA ESTRUCTURADA (MS1), UNA CAPA DIELECTRICA (DE1) Y UNA SEGUNDA CAPA METALICA ESTRUCTURADA (MS2), ESTANDO UNIDA DE FORMA ELECTRICAMENTE CONDUCTORA LA PRIMERA CAPA METALICA ESTRUCTURADA (MS1) A LA CONEXION DE POTENCIA (PA), Y UNIENDO LA SEGUNDA CAPA METALICA ESTRUCTURADA (MS2) DE LOS CONDUCTOS DE TIRA (SL) LAS CONEXIONES DE SEÑAL (SA) A UNAS CONEXIONES INTERIORES SUBORDINADAS (IA), Y CON AL MENOS UN CIRCUITO DE CONMUTACION DE MICROONDAS INTEGRADO (MIC) DISPUESTO SOBRE EL SUSTRATO (S), CUYAS CONEXIONES ESTAN UNIDAS DE FORMA ELECTRICAMENTE CONDUCTORA A LAS CONEXIONES INTERIORES (IA).
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19538465 | 1995-10-16 |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2170272T3 true ES2170272T3 (es) | 2002-08-01 |
Family
ID=7774970
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES96934617T Expired - Lifetime ES2170272T3 (es) | 1995-10-16 | 1996-10-10 | Carcasa de matriz de protuberancias polimeras para sistemas de conexiones de microondas. |
Country Status (8)
Country | Link |
---|---|
US (1) | US6130478A (es) |
EP (1) | EP0856198B1 (es) |
JP (1) | JP3011772B2 (es) |
KR (1) | KR100421301B1 (es) |
AT (1) | ATE211586T1 (es) |
DE (1) | DE59608615D1 (es) |
ES (1) | ES2170272T3 (es) |
WO (1) | WO1997015077A1 (es) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6493934B2 (en) | 1996-11-12 | 2002-12-17 | Salman Akram | Method for sawing wafers employing multiple indexing techniques for multiple die dimensions |
US6250192B1 (en) | 1996-11-12 | 2001-06-26 | Micron Technology, Inc. | Method for sawing wafers employing multiple indexing techniques for multiple die dimensions |
JP3543189B2 (ja) * | 1997-12-10 | 2004-07-14 | 日本オプネクスト株式会社 | 半導体素子パッケージおよび半導体装置 |
WO1999064195A2 (en) * | 1998-06-05 | 1999-12-16 | Dsm N.V. | Curved ceramic moulded part |
DE19921867C2 (de) * | 1999-05-11 | 2001-08-30 | Infineon Technologies Ag | Verfahren zur Herstellung eines Halbleiterbauelements mit mindestens einem verkapselten Chip auf einem Substrat |
US20020140096A1 (en) * | 2001-03-30 | 2002-10-03 | Siemens Dematic Electronics Assembly Systems, Inc. | Method and structure for ex-situ polymer stud grid array contact formation |
US6888240B2 (en) * | 2001-04-30 | 2005-05-03 | Intel Corporation | High performance, low cost microelectronic circuit package with interposer |
US6894399B2 (en) | 2001-04-30 | 2005-05-17 | Intel Corporation | Microelectronic device having signal distribution functionality on an interfacial layer thereof |
US20020167804A1 (en) * | 2001-05-14 | 2002-11-14 | Intel Corporation | Polymeric encapsulation material with fibrous filler for use in microelectronic circuit packaging |
US7071024B2 (en) * | 2001-05-21 | 2006-07-04 | Intel Corporation | Method for packaging a microelectronic device using on-die bond pad expansion |
US7183658B2 (en) * | 2001-09-05 | 2007-02-27 | Intel Corporation | Low cost microelectronic circuit package |
US20030057544A1 (en) * | 2001-09-13 | 2003-03-27 | Nathan Richard J. | Integrated assembly protocol |
US20030059976A1 (en) * | 2001-09-24 | 2003-03-27 | Nathan Richard J. | Integrated package and methods for making same |
US6638082B2 (en) | 2001-11-20 | 2003-10-28 | Fci Americas Technology, Inc. | Pin-grid-array electrical connector |
US6666693B2 (en) | 2001-11-20 | 2003-12-23 | Fci Americas Technology, Inc. | Surface-mounted right-angle electrical connector |
US20030153119A1 (en) * | 2002-02-14 | 2003-08-14 | Nathan Richard J. | Integrated circuit package and method for fabrication |
US6903458B1 (en) | 2002-06-20 | 2005-06-07 | Richard J. Nathan | Embedded carrier for an integrated circuit chip |
US6731189B2 (en) * | 2002-06-27 | 2004-05-04 | Raytheon Company | Multilayer stripline radio frequency circuits and interconnection methods |
US20050031840A1 (en) * | 2003-08-05 | 2005-02-10 | Xerox Corporation | RF connector |
US7052763B2 (en) * | 2003-08-05 | 2006-05-30 | Xerox Corporation | Multi-element connector |
JP2005353740A (ja) | 2004-06-09 | 2005-12-22 | Toshiba Corp | 半導体素子及び半導体装置 |
US20170356640A1 (en) * | 2016-06-10 | 2017-12-14 | Innotec, Corp. | Illumination assembly including thermal energy management |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3271507A (en) * | 1965-11-02 | 1966-09-06 | Alloys Unltd Inc | Flat package for semiconductors |
US3483308A (en) * | 1968-10-24 | 1969-12-09 | Texas Instruments Inc | Modular packages for semiconductor devices |
CA1293544C (en) * | 1987-07-01 | 1991-12-24 | Timothy P. Patterson | Plated plastic castellated interconnect for electrical components |
DE3732249A1 (de) * | 1987-09-24 | 1989-04-13 | Siemens Ag | Verfahren zur herstellung von dreidimensionalen leiterplatten |
US5072283A (en) * | 1988-04-12 | 1991-12-10 | Bolger Justin C | Pre-formed chip carrier cavity package |
US4943346A (en) * | 1988-09-29 | 1990-07-24 | Siemens Aktiengesellschaft | Method for manufacturing printed circuit boards |
US5280194A (en) * | 1988-11-21 | 1994-01-18 | Micro Technology Partners | Electrical apparatus with a metallic layer coupled to a lower region of a substrate and metallic layer coupled to a lower region of a semiconductor device |
US5081520A (en) * | 1989-05-16 | 1992-01-14 | Minolta Camera Kabushiki Kaisha | Chip mounting substrate having an integral molded projection and conductive pattern |
US5206712A (en) * | 1990-04-05 | 1993-04-27 | General Electric Company | Building block approach to microwave modules |
WO1992002040A1 (en) * | 1990-07-25 | 1992-02-06 | Dsm N.V. | Package for incorporating an integrated circuit and a process for the production of the package |
DE69318879T2 (de) * | 1992-04-03 | 1998-10-08 | Matsushita Electric Ind Co Ltd | Keramisches Mehrschicht-Substrat für hohe Frequenzen |
US5338970A (en) * | 1993-03-24 | 1994-08-16 | Intergraph Corporation | Multi-layered integrated circuit package with improved high frequency performance |
EP0645953B1 (de) * | 1993-09-29 | 1997-08-06 | Siemens NV | Verfahren zur Herstellung einer zwei- oder mehrlagigen Verdrahtung und danach hergestellte zwei- oder mehrlagige Verdrahtung |
US5629835A (en) * | 1994-07-19 | 1997-05-13 | Olin Corporation | Metal ball grid array package with improved thermal conductivity |
US5929516A (en) * | 1994-09-23 | 1999-07-27 | Siemens N.V. | Polymer stud grid array |
-
1996
- 1996-10-10 KR KR10-1998-0702731A patent/KR100421301B1/ko not_active IP Right Cessation
- 1996-10-10 US US09/051,777 patent/US6130478A/en not_active Expired - Lifetime
- 1996-10-10 EP EP96934617A patent/EP0856198B1/de not_active Expired - Lifetime
- 1996-10-10 ES ES96934617T patent/ES2170272T3/es not_active Expired - Lifetime
- 1996-10-10 JP JP9515492A patent/JP3011772B2/ja not_active Expired - Fee Related
- 1996-10-10 DE DE59608615T patent/DE59608615D1/de not_active Expired - Fee Related
- 1996-10-10 WO PCT/EP1996/004404 patent/WO1997015077A1/de active IP Right Grant
- 1996-10-10 AT AT96934617T patent/ATE211586T1/de not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR19990064243A (ko) | 1999-07-26 |
EP0856198A1 (de) | 1998-08-05 |
JPH10512402A (ja) | 1998-11-24 |
ATE211586T1 (de) | 2002-01-15 |
EP0856198B1 (de) | 2002-01-02 |
US6130478A (en) | 2000-10-10 |
JP3011772B2 (ja) | 2000-02-21 |
KR100421301B1 (ko) | 2004-09-18 |
DE59608615D1 (de) | 2002-02-28 |
WO1997015077A1 (de) | 1997-04-24 |
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