ES2168329T3 - Metodo y aparato para mejorar el comportamiento del sistema en un sistema de tratamiento de datos. - Google Patents
Metodo y aparato para mejorar el comportamiento del sistema en un sistema de tratamiento de datos.Info
- Publication number
- ES2168329T3 ES2168329T3 ES95115748T ES95115748T ES2168329T3 ES 2168329 T3 ES2168329 T3 ES 2168329T3 ES 95115748 T ES95115748 T ES 95115748T ES 95115748 T ES95115748 T ES 95115748T ES 2168329 T3 ES2168329 T3 ES 2168329T3
- Authority
- ES
- Spain
- Prior art keywords
- instruction
- dib
- instructions
- executed
- ldis
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000001698 laser desorption ionisation Methods 0.000 abstract 3
- 230000000295 complement effect Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3808—Instruction prefetching for instruction reuse, e.g. trace cache, branch target cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30061—Multi-way branch instructions, e.g. CASE
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
- G06F9/384—Register renaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3856—Reordering of instructions, e.g. using queues or age tags
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3858—Result writeback, i.e. updating the architectural state or memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Communication Control (AREA)
- Hardware Redundancy (AREA)
Abstract
UN APARATO PROCESADOR INFORMATICO QUE INCLUYE UNA MEMORIA INTERMEDIA LLAMADA MEMORIA INTERMEDIA DE INSTRUCCION DECODIFICADO (DIB), QUE SE UTILIZA PARA ALMACENAR GRUPOS DE ORDENES QUE REPRESENTAN INSTRUCCIONES QUE PUEDEN SER EJECUTADAS EN PARALELO. CADA DISEÑO EN UN GRUPO DIB PUEDE SER UNA CODIFICACION DE UNA INSTRUCCION LARGA LLAMADA INSTRUCCION DECODIFICADA LARGA (LDI). EL DIB OPERA EN CONJUNCION CON UN APARATO PROCESADOR INFORMATICO CONVENCIONAL QUE INCLUYE UN SISTEMA DE MEMORIA, UNA COLA DE INSTRUCCION Y UNA UNIDAD DE ENVIO DE INSTRUCCION QUE ALIMENTA A UN CONJUNTO DE UNIDADES DE EJECUCION. CUANDO UNA INSTRUCCION NO ESTA DISPONIBLE EN EL DIB, ESTA Y LAS INSTRUCCIONES SUBSECUENTES SE TOMAN DEL SISTEMA DE LA MEMORIA Y SE LLEVAN A LA COLA DE INSTRUCCION Y SE EJECUTAN DE FORMA CONVENCIONAL, IMPLICANDO BIEN UN SUBCONJUNTO DE UNIDADES FUNCIONALES DISPONIBLES, O UNIDADES FUNCIONALES DEDICADAS A ESTE PROPOSITO. DE MANERA SIMULTANEA A LA EJECUCION DE LAS INSTRUCCIONES POR PARTE DEL APARATO CONVENCIONAL, UN FORMATEADOR DE GRUPO CREA UN CONJUNTO DE LDIS, CADA UNO DE LOS CUALES ES UNA CODIFICACION ALTERNATIVA DE UN CONJUNTO DE INSTRUCCIONES ORIGINALES QUE PUEDEN EJECUTARSE EN PARALELO. EN LA CONSTRUCCION DE LOS LDIS, EL FORMATEADOR DE GRUPO ANALIZA LA DEPENDENCIA ENTRE LAS INSTRUCCIONES Y LA LATENCIA DE INSTRUCCION. CADA UNO DE LOS CONJUNTOS DE LDIS CONSTRUIDOS POR EL FORMATEADOR DE GRUPO SE GUARDA EN EL DIB DE MANERA QUE LA SIGUIENTE EJECUCION DEL MISMO CONJUNTO DE INSTRUCCIONES PUEDE EJECUTARSE DIRECTAMENTE DESDE EL DIB CON EL COMPLEMENTO TOTAL DE UNIDADES FUNCIONALES Y NO REQUERIRA EL ESFUERZO DE DEPENDENCIA Y EL ANALISIS DE LATENCIA.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/421,272 US5699536A (en) | 1995-04-13 | 1995-04-13 | Computer processing system employing dynamic instruction formatting |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2168329T3 true ES2168329T3 (es) | 2002-06-16 |
Family
ID=23669880
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES95115748T Expired - Lifetime ES2168329T3 (es) | 1995-04-13 | 1995-10-06 | Metodo y aparato para mejorar el comportamiento del sistema en un sistema de tratamiento de datos. |
Country Status (10)
Country | Link |
---|---|
US (1) | US5699536A (es) |
EP (1) | EP0737915B1 (es) |
JP (1) | JP3093629B2 (es) |
KR (1) | KR100230552B1 (es) |
CN (1) | CN1122227C (es) |
AT (1) | ATE210851T1 (es) |
CA (1) | CA2168896A1 (es) |
DE (1) | DE69524570T2 (es) |
ES (1) | ES2168329T3 (es) |
TW (1) | TW274600B (es) |
Families Citing this family (41)
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US6105124A (en) * | 1996-01-26 | 2000-08-15 | Intel Corporation | Method and apparatus for merging binary translated basic blocks of instructions |
JP3623840B2 (ja) | 1996-01-31 | 2005-02-23 | 株式会社ルネサステクノロジ | データ処理装置及びマイクロプロセッサ |
JPH09265397A (ja) * | 1996-03-29 | 1997-10-07 | Hitachi Ltd | Vliw命令用プロセッサ |
US5913054A (en) * | 1996-12-16 | 1999-06-15 | International Business Machines Corporation | Method and system for processing a multiple-register instruction that permit multiple data words to be written in a single processor cycle |
US5923862A (en) * | 1997-01-28 | 1999-07-13 | Samsung Electronics Co., Ltd. | Processor that decodes a multi-cycle instruction into single-cycle micro-instructions and schedules execution of the micro-instructions |
US6009263A (en) * | 1997-07-28 | 1999-12-28 | Institute For The Development Of Emerging Architectures, L.L.C. | Emulating agent and method for reformatting computer instructions into a standard uniform format |
US6237077B1 (en) * | 1997-10-13 | 2001-05-22 | Idea Corporation | Instruction template for efficient processing clustered branch instructions |
US5913047A (en) * | 1997-10-29 | 1999-06-15 | Advanced Micro Devices, Inc. | Pairing floating point exchange instruction with another floating point instruction to reduce dispatch latency |
US6249855B1 (en) * | 1998-06-02 | 2001-06-19 | Compaq Computer Corporation | Arbiter system for central processing unit having dual dominoed encoders for four instruction issue per machine cycle |
US6240510B1 (en) | 1998-08-06 | 2001-05-29 | Intel Corporation | System for processing a cluster of instructions where the instructions are issued to the execution units having a priority order according to a template associated with the cluster of instructions |
US6304960B1 (en) | 1998-08-06 | 2001-10-16 | Intel Corporation | Validating prediction for branches in a cluster via comparison of predicted and condition selected tentative target addresses and validation of branch conditions |
US6385708B1 (en) * | 1998-11-16 | 2002-05-07 | Infineon Technologies Ag | Using a timing-look-up-table and page timers to determine the time between two consecutive memory accesses |
US6247097B1 (en) | 1999-01-22 | 2001-06-12 | International Business Machines Corporation | Aligned instruction cache handling of instruction fetches across multiple predicted branch instructions |
JP2001005675A (ja) * | 1999-06-21 | 2001-01-12 | Matsushita Electric Ind Co Ltd | プログラム変換装置及びプロセッサ |
US6708267B1 (en) | 2000-02-04 | 2004-03-16 | International Business Machines Corporation | System and method in a pipelined processor for generating a single cycle pipeline stall |
ATE464600T1 (de) | 2000-02-28 | 2010-04-15 | Nxp Bv | Datenprozessor mit meherern befehlen umfassende befehlswörtern |
GB2367653B (en) | 2000-10-05 | 2004-10-20 | Advanced Risc Mach Ltd | Restarting translated instructions |
US6622269B1 (en) * | 2000-11-27 | 2003-09-16 | Intel Corporation | Memory fault isolation apparatus and methods |
US6877089B2 (en) | 2000-12-27 | 2005-04-05 | International Business Machines Corporation | Branch prediction apparatus and process for restoring replaced branch history for use in future branch predictions for an executing program |
US7072347B2 (en) * | 2001-02-23 | 2006-07-04 | International Business Machines Corporation | Assignment of packet descriptor field positions in a network processor |
US7356673B2 (en) * | 2001-04-30 | 2008-04-08 | International Business Machines Corporation | System and method including distributed instruction buffers for storing frequently executed instructions in predecoded form |
US7114058B1 (en) * | 2001-12-31 | 2006-09-26 | Apple Computer, Inc. | Method and apparatus for forming and dispatching instruction groups based on priority comparisons |
US7761852B2 (en) * | 2003-11-26 | 2010-07-20 | International Business Machines Corporation | Fast detection of the origins of memory leaks when using pooled resources |
US7665070B2 (en) * | 2004-04-23 | 2010-02-16 | International Business Machines Corporation | Method and apparatus for a computing system using meta program representation |
US7730470B2 (en) * | 2006-02-27 | 2010-06-01 | Oracle America, Inc. | Binary code instrumentation to reduce effective memory latency |
TWI348135B (en) | 2006-06-05 | 2011-09-01 | Chunghwa Picture Tubes Ltd | Image contrast correct system and method thereof |
US8301870B2 (en) * | 2006-07-27 | 2012-10-30 | International Business Machines Corporation | Method and apparatus for fast synchronization and out-of-order execution of instructions in a meta-program based computing system |
JP4996945B2 (ja) * | 2007-02-28 | 2012-08-08 | 公立大学法人広島市立大学 | データ処理装置、データ処理方法 |
US8281109B2 (en) | 2007-12-27 | 2012-10-02 | Intel Corporation | Compressed instruction format |
CN101290589B (zh) * | 2007-12-27 | 2010-06-16 | 华为技术有限公司 | 一种并发指令操作方法和装置 |
CN102063330B (zh) * | 2011-01-05 | 2013-04-24 | 北京航空航天大学 | 一种大规模并行程序性能数据采集方法 |
US9395988B2 (en) * | 2013-03-08 | 2016-07-19 | Samsung Electronics Co., Ltd. | Micro-ops including packed source and destination fields |
GB2514618B (en) * | 2013-05-31 | 2020-11-11 | Advanced Risc Mach Ltd | Data processing systems |
US20150220343A1 (en) * | 2014-02-05 | 2015-08-06 | Mill Computing, Inc. | Computer Processor Employing Phases of Operations Contained in Wide Instructions |
GB2539411B (en) * | 2015-06-15 | 2017-06-28 | Bluwireless Tech Ltd | Data processing |
US11829767B2 (en) | 2022-01-30 | 2023-11-28 | Simplex Micro, Inc. | Register scoreboard for a microprocessor with a time counter for statically dispatching instructions |
US11829762B2 (en) | 2022-01-30 | 2023-11-28 | Simplex Micro, Inc. | Time-resource matrix for a microprocessor with time counter for statically dispatching instructions |
US11954491B2 (en) | 2022-01-30 | 2024-04-09 | Simplex Micro, Inc. | Multi-threading microprocessor with a time counter for statically dispatching instructions |
US12001848B2 (en) | 2022-01-30 | 2024-06-04 | Simplex Micro, Inc. | Microprocessor with time counter for statically dispatching instructions with phantom registers |
US11829187B2 (en) | 2022-01-30 | 2023-11-28 | Simplex Micro, Inc. | Microprocessor with time counter for statically dispatching instructions |
US20230315474A1 (en) * | 2022-04-05 | 2023-10-05 | Simplex Micro, Inc. | Microprocessor with apparatus and method for replaying instructions |
Family Cites Families (20)
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US4295193A (en) * | 1979-06-29 | 1981-10-13 | International Business Machines Corporation | Machine for multiple instruction execution |
US4466061A (en) * | 1982-06-08 | 1984-08-14 | Burroughs Corporation | Concurrent processing elements for using dependency free code |
US4484272A (en) * | 1982-07-14 | 1984-11-20 | Burroughs Corporation | Digital computer for executing multiple instruction sets in a simultaneous-interleaved fashion |
JPS5932045A (ja) * | 1982-08-16 | 1984-02-21 | Hitachi Ltd | 情報処理装置 |
US4679141A (en) * | 1985-04-29 | 1987-07-07 | International Business Machines Corporation | Pageable branch history table |
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US5021945A (en) * | 1985-10-31 | 1991-06-04 | Mcc Development, Ltd. | Parallel processor system for processing natural concurrencies and method therefor |
US4903196A (en) * | 1986-05-02 | 1990-02-20 | International Business Machines Corporation | Method and apparatus for guaranteeing the logical integrity of data in the general purpose registers of a complex multi-execution unit uniprocessor |
US4825360A (en) * | 1986-07-30 | 1989-04-25 | Symbolics, Inc. | System and method for parallel processing with mostly functional languages |
US4811214A (en) * | 1986-11-14 | 1989-03-07 | Princeton University | Multinode reconfigurable pipeline computer |
US5127104A (en) * | 1986-12-29 | 1992-06-30 | Dataflow Computer Corporation | Method and product involving translation and execution of programs by automatic partitioning and data structure allocation |
US4992938A (en) * | 1987-07-01 | 1991-02-12 | International Business Machines Corporation | Instruction control mechanism for a computing system with register renaming, map table and queues indicating available registers |
EP0394624B1 (en) * | 1989-04-24 | 1997-06-18 | International Business Machines Corporation | Multiple sequence processor system |
US5197137A (en) * | 1989-07-28 | 1993-03-23 | International Business Machines Corporation | Computer architecture for the concurrent execution of sequential programs |
DE69123629T2 (de) * | 1990-05-04 | 1997-06-12 | Ibm | Maschinenarchitektur für skalaren Verbundbefehlssatz |
EP0474297B1 (en) * | 1990-09-05 | 1998-06-10 | Koninklijke Philips Electronics N.V. | Very long instruction word machine for efficient execution of programs with conditional branches |
US5299321A (en) * | 1990-12-18 | 1994-03-29 | Oki Electric Industry Co., Ltd. | Parallel processing device to operate with parallel execute instructions |
AU2158692A (en) * | 1991-05-24 | 1993-01-08 | British Technology Group Usa, Inc. | Optimizing compiler for computers |
US5347639A (en) * | 1991-07-15 | 1994-09-13 | International Business Machines Corporation | Self-parallelizing computer system and method |
US5408658A (en) * | 1991-07-15 | 1995-04-18 | International Business Machines Corporation | Self-scheduling parallel computer system and method |
-
1995
- 1995-04-13 US US08/421,272 patent/US5699536A/en not_active Expired - Fee Related
- 1995-10-06 EP EP95115748A patent/EP0737915B1/en not_active Expired - Lifetime
- 1995-10-06 ES ES95115748T patent/ES2168329T3/es not_active Expired - Lifetime
- 1995-10-06 DE DE69524570T patent/DE69524570T2/de not_active Expired - Fee Related
- 1995-10-06 AT AT95115748T patent/ATE210851T1/de not_active IP Right Cessation
- 1995-10-07 TW TW084110576A patent/TW274600B/zh active
-
1996
- 1996-02-06 CA CA002168896A patent/CA2168896A1/en not_active Abandoned
- 1996-04-01 CN CN96104502A patent/CN1122227C/zh not_active Expired - Fee Related
- 1996-04-04 KR KR1019960010200A patent/KR100230552B1/ko not_active IP Right Cessation
- 1996-04-09 JP JP08086944A patent/JP3093629B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR960038600A (ko) | 1996-11-21 |
DE69524570D1 (de) | 2002-01-24 |
EP0737915A1 (en) | 1996-10-16 |
CA2168896A1 (en) | 1996-10-14 |
ATE210851T1 (de) | 2001-12-15 |
JP3093629B2 (ja) | 2000-10-03 |
CN1122227C (zh) | 2003-09-24 |
US5699536A (en) | 1997-12-16 |
DE69524570T2 (de) | 2002-08-22 |
JPH0922354A (ja) | 1997-01-21 |
TW274600B (en) | 1996-04-21 |
EP0737915B1 (en) | 2001-12-12 |
KR100230552B1 (ko) | 1999-11-15 |
CN1136184A (zh) | 1996-11-20 |
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