DE69524570D1 - Verfahren und Vorrichtung zur Verbesserung der Systemleistung in einem Datenverarbeitungssystem - Google Patents

Verfahren und Vorrichtung zur Verbesserung der Systemleistung in einem Datenverarbeitungssystem

Info

Publication number
DE69524570D1
DE69524570D1 DE69524570T DE69524570T DE69524570D1 DE 69524570 D1 DE69524570 D1 DE 69524570D1 DE 69524570 T DE69524570 T DE 69524570T DE 69524570 T DE69524570 T DE 69524570T DE 69524570 D1 DE69524570 D1 DE 69524570D1
Authority
DE
Germany
Prior art keywords
instruction
dib
instructions
executed
ldis
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69524570T
Other languages
English (en)
Other versions
DE69524570T2 (de
Inventor
Martin Edward Hopkins
Ravindra K Nair
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE69524570D1 publication Critical patent/DE69524570D1/de
Application granted granted Critical
Publication of DE69524570T2 publication Critical patent/DE69524570T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3808—Instruction prefetching for instruction reuse, e.g. trace cache, branch target cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30061—Multi-way branch instructions, e.g. CASE
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G06F9/384—Register renaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3856—Reordering of instructions, e.g. using queues or age tags
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858—Result writeback, i.e. updating the architectural state or memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Hardware Redundancy (AREA)
  • Communication Control (AREA)
DE69524570T 1995-04-13 1995-10-06 Verfahren und Vorrichtung zur Verbesserung der Systemleistung in einem Datenverarbeitungssystem Expired - Fee Related DE69524570T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/421,272 US5699536A (en) 1995-04-13 1995-04-13 Computer processing system employing dynamic instruction formatting

Publications (2)

Publication Number Publication Date
DE69524570D1 true DE69524570D1 (de) 2002-01-24
DE69524570T2 DE69524570T2 (de) 2002-08-22

Family

ID=23669880

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69524570T Expired - Fee Related DE69524570T2 (de) 1995-04-13 1995-10-06 Verfahren und Vorrichtung zur Verbesserung der Systemleistung in einem Datenverarbeitungssystem

Country Status (10)

Country Link
US (1) US5699536A (de)
EP (1) EP0737915B1 (de)
JP (1) JP3093629B2 (de)
KR (1) KR100230552B1 (de)
CN (1) CN1122227C (de)
AT (1) ATE210851T1 (de)
CA (1) CA2168896A1 (de)
DE (1) DE69524570T2 (de)
ES (1) ES2168329T3 (de)
TW (1) TW274600B (de)

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US5913054A (en) * 1996-12-16 1999-06-15 International Business Machines Corporation Method and system for processing a multiple-register instruction that permit multiple data words to be written in a single processor cycle
US5923862A (en) * 1997-01-28 1999-07-13 Samsung Electronics Co., Ltd. Processor that decodes a multi-cycle instruction into single-cycle micro-instructions and schedules execution of the micro-instructions
US6009263A (en) * 1997-07-28 1999-12-28 Institute For The Development Of Emerging Architectures, L.L.C. Emulating agent and method for reformatting computer instructions into a standard uniform format
US6237077B1 (en) * 1997-10-13 2001-05-22 Idea Corporation Instruction template for efficient processing clustered branch instructions
US5913047A (en) * 1997-10-29 1999-06-15 Advanced Micro Devices, Inc. Pairing floating point exchange instruction with another floating point instruction to reduce dispatch latency
US6249855B1 (en) * 1998-06-02 2001-06-19 Compaq Computer Corporation Arbiter system for central processing unit having dual dominoed encoders for four instruction issue per machine cycle
US6240510B1 (en) 1998-08-06 2001-05-29 Intel Corporation System for processing a cluster of instructions where the instructions are issued to the execution units having a priority order according to a template associated with the cluster of instructions
US6304960B1 (en) 1998-08-06 2001-10-16 Intel Corporation Validating prediction for branches in a cluster via comparison of predicted and condition selected tentative target addresses and validation of branch conditions
US6385708B1 (en) * 1998-11-16 2002-05-07 Infineon Technologies Ag Using a timing-look-up-table and page timers to determine the time between two consecutive memory accesses
US6247097B1 (en) 1999-01-22 2001-06-12 International Business Machines Corporation Aligned instruction cache handling of instruction fetches across multiple predicted branch instructions
JP2001005675A (ja) * 1999-06-21 2001-01-12 Matsushita Electric Ind Co Ltd プログラム変換装置及びプロセッサ
US6708267B1 (en) 2000-02-04 2004-03-16 International Business Machines Corporation System and method in a pipelined processor for generating a single cycle pipeline stall
JP2003525493A (ja) 2000-02-28 2003-08-26 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ マルチコマンド命令語を有するデータプロセッサ
GB2367653B (en) 2000-10-05 2004-10-20 Advanced Risc Mach Ltd Restarting translated instructions
US6622269B1 (en) * 2000-11-27 2003-09-16 Intel Corporation Memory fault isolation apparatus and methods
US6877089B2 (en) 2000-12-27 2005-04-05 International Business Machines Corporation Branch prediction apparatus and process for restoring replaced branch history for use in future branch predictions for an executing program
US7072347B2 (en) * 2001-02-23 2006-07-04 International Business Machines Corporation Assignment of packet descriptor field positions in a network processor
US7356673B2 (en) * 2001-04-30 2008-04-08 International Business Machines Corporation System and method including distributed instruction buffers for storing frequently executed instructions in predecoded form
US7114058B1 (en) * 2001-12-31 2006-09-26 Apple Computer, Inc. Method and apparatus for forming and dispatching instruction groups based on priority comparisons
US7761852B2 (en) * 2003-11-26 2010-07-20 International Business Machines Corporation Fast detection of the origins of memory leaks when using pooled resources
US7665070B2 (en) * 2004-04-23 2010-02-16 International Business Machines Corporation Method and apparatus for a computing system using meta program representation
US7730470B2 (en) * 2006-02-27 2010-06-01 Oracle America, Inc. Binary code instrumentation to reduce effective memory latency
TWI348135B (en) 2006-06-05 2011-09-01 Chunghwa Picture Tubes Ltd Image contrast correct system and method thereof
US8301870B2 (en) * 2006-07-27 2012-10-30 International Business Machines Corporation Method and apparatus for fast synchronization and out-of-order execution of instructions in a meta-program based computing system
JP4996945B2 (ja) * 2007-02-28 2012-08-08 公立大学法人広島市立大学 データ処理装置、データ処理方法
US8281109B2 (en) * 2007-12-27 2012-10-02 Intel Corporation Compressed instruction format
CN101290589B (zh) * 2007-12-27 2010-06-16 华为技术有限公司 一种并发指令操作方法和装置
CN102063330B (zh) * 2011-01-05 2013-04-24 北京航空航天大学 一种大规模并行程序性能数据采集方法
US9395988B2 (en) * 2013-03-08 2016-07-19 Samsung Electronics Co., Ltd. Micro-ops including packed source and destination fields
GB2514618B (en) * 2013-05-31 2020-11-11 Advanced Risc Mach Ltd Data processing systems
US20150220343A1 (en) * 2014-02-05 2015-08-06 Mill Computing, Inc. Computer Processor Employing Phases of Operations Contained in Wide Instructions
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US11954491B2 (en) 2022-01-30 2024-04-09 Simplex Micro, Inc. Multi-threading microprocessor with a time counter for statically dispatching instructions
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Also Published As

Publication number Publication date
ATE210851T1 (de) 2001-12-15
JP3093629B2 (ja) 2000-10-03
EP0737915A1 (de) 1996-10-16
CN1122227C (zh) 2003-09-24
JPH0922354A (ja) 1997-01-21
CA2168896A1 (en) 1996-10-14
KR960038600A (ko) 1996-11-21
TW274600B (en) 1996-04-21
CN1136184A (zh) 1996-11-20
EP0737915B1 (de) 2001-12-12
DE69524570T2 (de) 2002-08-22
KR100230552B1 (ko) 1999-11-15
ES2168329T3 (es) 2002-06-16
US5699536A (en) 1997-12-16

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8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee