JPS56114051A - Data process system - Google Patents

Data process system

Info

Publication number
JPS56114051A
JPS56114051A JP1700680A JP1700680A JPS56114051A JP S56114051 A JPS56114051 A JP S56114051A JP 1700680 A JP1700680 A JP 1700680A JP 1700680 A JP1700680 A JP 1700680A JP S56114051 A JPS56114051 A JP S56114051A
Authority
JP
Japan
Prior art keywords
instruction
block
execution
program
speed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1700680A
Other languages
Japanese (ja)
Inventor
Takashi Suga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1700680A priority Critical patent/JPS56114051A/en
Publication of JPS56114051A publication Critical patent/JPS56114051A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3808—Instruction prefetching for instruction reuse, e.g. trace cache, branch target cache
    • G06F9/381—Loop buffering

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE:To realize an effective control of execution and thus ensure a high-speed execution of a program for an electronic computer incorporating a program, by providing previously the information on the control structure of the program. CONSTITUTION:When the head execution control instruction of the instruction block is extracted within the central processor 33, the following control structure with every instruction is known by the execution control instruction. In the case of the instruction block 30, the execution sequence is not varied within the block. Thus a high-speed execution is realized by extracting previously all the instructions within the block out to the high-speed buffer memory device 35. For the repetitive block 31, the branch instruction is contained in the block to ensure no repetition at all times. In the actual case, however, several times of repetitions are given virtually in all cases, and then the process proceeds to the next instruction block. Accordingly a high-speed execution is realized by prefetching the instruction at the side where the repetition is carried out.
JP1700680A 1980-02-14 1980-02-14 Data process system Pending JPS56114051A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1700680A JPS56114051A (en) 1980-02-14 1980-02-14 Data process system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1700680A JPS56114051A (en) 1980-02-14 1980-02-14 Data process system

Publications (1)

Publication Number Publication Date
JPS56114051A true JPS56114051A (en) 1981-09-08

Family

ID=11931908

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1700680A Pending JPS56114051A (en) 1980-02-14 1980-02-14 Data process system

Country Status (1)

Country Link
JP (1) JPS56114051A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0895785A (en) * 1994-09-29 1996-04-12 Nec Software Ltd Branch predicting device
JP2013250593A (en) * 2012-05-30 2013-12-12 Renesas Electronics Corp Semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5011743A (en) * 1973-06-04 1975-02-06
JPS5023949A (en) * 1973-06-27 1975-03-14
JPS51130135A (en) * 1975-05-07 1976-11-12 Fujitsu Ltd Information processing system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5011743A (en) * 1973-06-04 1975-02-06
JPS5023949A (en) * 1973-06-27 1975-03-14
JPS51130135A (en) * 1975-05-07 1976-11-12 Fujitsu Ltd Information processing system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0895785A (en) * 1994-09-29 1996-04-12 Nec Software Ltd Branch predicting device
JP2013250593A (en) * 2012-05-30 2013-12-12 Renesas Electronics Corp Semiconductor device

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