ES2104672T3 - Metodo de ensayo de circuitos. - Google Patents
Metodo de ensayo de circuitos.Info
- Publication number
- ES2104672T3 ES2104672T3 ES91307952T ES91307952T ES2104672T3 ES 2104672 T3 ES2104672 T3 ES 2104672T3 ES 91307952 T ES91307952 T ES 91307952T ES 91307952 T ES91307952 T ES 91307952T ES 2104672 T3 ES2104672 T3 ES 2104672T3
- Authority
- ES
- Spain
- Prior art keywords
- circuits
- knots
- knot
- information
- defective
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/3167—Testing of combined analog and digital circuits
Abstract
LA INVENCION ACTUAL SE REFIERE AL METODO PARA PROBAR CIRCUITOS DIGITALES O ANALOGICOS. SI SE DETECTA UN FALLO DESPUES DE QUE SE HAYA APLICADO UN ESTIMULO, Y SE REALIZAN MEDICIONES DE PRUEBA EN ALGUNOS NUDOS DE CIRCUITOS , SE TOMARAN MEDIDAS PARA LOCALIZAR LOS COMPONENTES DEL CIRCUITO DEFECTUOSOS. SE SELECCIONA AL MENOS OTRO NUDO POSTERIOR, PARA MEDIRLO EN BASE A LOS NIVELES DE INFORMACION QUE DICHOS NUDOS PODRAN PROPORCIONAR. MEDICIONES POSTERIORES AYUDAN A LOCALIZACIONES DEFECTUOSAS. LOS NIVELES DE INFORMACION DE LOS CIRCUITOS ANALOGICOS SE DETERMINAN CALCULANDO LOS FACTORES DE DISCRIMINACION QUE DEPENDEN DE GAMAS DE TENSION POSIBLES EN NUDOS DE CIRCUITOS INMESURABLES SI SE CONSIDERA A VARIOS COMPONENTES COMO DEFECTUOSOS. LA INFORMACION GANADA MEDIANTE LA MEDIDA EN UN NUDO POSTERIOR SE UTILIZA PARA REDUCIR LAS GAMAS DE TENSION A FIN DE AYUDAR A SELECCIONAR OTRO NUDO PARA MEDIR.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB909019614A GB9019614D0 (en) | 1990-09-07 | 1990-09-07 | Improved probing in analogue diagnosis |
GB9107484A GB2249399B (en) | 1990-09-07 | 1991-04-09 | Circuit test method |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2104672T3 true ES2104672T3 (es) | 1997-10-16 |
Family
ID=26297623
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES91307952T Expired - Lifetime ES2104672T3 (es) | 1990-09-07 | 1991-08-30 | Metodo de ensayo de circuitos. |
Country Status (6)
Country | Link |
---|---|
US (1) | US5210486A (es) |
EP (1) | EP0474439B1 (es) |
JP (1) | JP3219287B2 (es) |
CA (1) | CA2050501C (es) |
DE (1) | DE69127149T2 (es) |
ES (1) | ES2104672T3 (es) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2278689B (en) * | 1993-06-02 | 1997-03-19 | Ford Motor Co | Method and apparatus for testing integrated circuits |
US5544175A (en) * | 1994-03-15 | 1996-08-06 | Hewlett-Packard Company | Method and apparatus for the capturing and characterization of high-speed digital information |
US5659257A (en) * | 1994-07-05 | 1997-08-19 | Ford Motor Company | Method and circuit structure for measuring and testing discrete components on mixed-signal circuit boards |
US6393385B1 (en) * | 1995-02-07 | 2002-05-21 | Texas Instruments Incorporated | Knowledge driven simulation time and data reduction technique |
US7395468B2 (en) * | 2004-03-23 | 2008-07-01 | Broadcom Corporation | Methods for debugging scan testing failures of integrated circuits |
US7581150B2 (en) | 2004-09-28 | 2009-08-25 | Broadcom Corporation | Methods and computer program products for debugging clock-related scan testing failures of integrated circuits |
US7500165B2 (en) | 2004-10-06 | 2009-03-03 | Broadcom Corporation | Systems and methods for controlling clock signals during scan testing integrated circuits |
CN105629156B (zh) * | 2016-03-10 | 2018-04-13 | 电子科技大学 | 基于遗传规划的模拟电路故障测试最优序贯搜索方法 |
US11045711B2 (en) | 2019-03-04 | 2021-06-29 | MagSkiTies LLC | Ski management device |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4709366A (en) * | 1985-07-29 | 1987-11-24 | John Fluke Mfg. Co., Inc. | Computer assisted fault isolation in circuit board testing |
US4847795A (en) * | 1987-08-24 | 1989-07-11 | Hughes Aircraft Company | System for diagnosing defects in electronic assemblies |
US4964125A (en) * | 1988-08-19 | 1990-10-16 | Hughes Aircraft Company | Method and apparatus for diagnosing faults |
GB8900386D0 (en) * | 1989-01-09 | 1989-03-08 | Shlumberger Technologies Limit | Circuit test method |
US5157668A (en) * | 1989-07-05 | 1992-10-20 | Applied Diagnostics, Inc. | Method and apparatus for locating faults in electronic units |
FR2659144B2 (fr) * | 1989-07-13 | 1992-07-24 | Dassault Electronique | Dispositif electronique de test d'un reseau de composants, notamment un circuit electronique. |
-
1991
- 1991-08-30 ES ES91307952T patent/ES2104672T3/es not_active Expired - Lifetime
- 1991-08-30 DE DE69127149T patent/DE69127149T2/de not_active Expired - Fee Related
- 1991-08-30 EP EP91307952A patent/EP0474439B1/en not_active Expired - Lifetime
- 1991-09-03 CA CA002050501A patent/CA2050501C/en not_active Expired - Fee Related
- 1991-09-06 US US07/755,673 patent/US5210486A/en not_active Expired - Lifetime
- 1991-09-07 JP JP25570791A patent/JP3219287B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0474439B1 (en) | 1997-08-06 |
JP3219287B2 (ja) | 2001-10-15 |
CA2050501A1 (en) | 1992-03-08 |
US5210486A (en) | 1993-05-11 |
DE69127149T2 (de) | 1998-02-05 |
DE69127149D1 (de) | 1997-09-11 |
EP0474439A2 (en) | 1992-03-11 |
CA2050501C (en) | 1999-12-21 |
JPH04289471A (ja) | 1992-10-14 |
EP0474439A3 (en) | 1993-06-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
ES2104672T3 (es) | Metodo de ensayo de circuitos. | |
CH631860B (de) | Verfahren zur hochaufloesenden und hochgenauen zeitmessung. | |
DE3776714D1 (de) | Geraet und verfahren zum kalibrieren eines wechselspannungsniveaus. | |
JP3108455B2 (ja) | ブレークダウン電圧の測定方法 | |
KR920015137A (ko) | 저저항값의 정밀측정방법 | |
ATE106574T1 (de) | Messverfahren und schaltungsanordnung zur ermittlung des auslösestroms von fi-schaltern. | |
JPS5320323A (en) | Exposure meter | |
CN113758685A (zh) | 一种光纤陀螺用输出光功率稳定的光源筛选方法及系统 | |
JPS5322757A (en) | Testing apparatus of electric a ppliances | |
JPS5692476A (en) | Measuring device of ic | |
ES2117873T3 (es) | Aparato de validacion de articulos de valor, y un metodo de calibrado de dicho aparato | |
SU119270A1 (ru) | Способ определени дифференциальной крутизны вольтамперной характеристики полупроводникового выпр мител и устройство дл осуществлени этого способа | |
SU387292A1 (ru) | Ьньлио | |
SU382983A1 (ru) | Автоматическое устройство для испытаний | |
SU62763A1 (ru) | Способ измерени отношени двух электрических величин | |
GB524618A (en) | Improvements in counting or indicating devices | |
SU144549A1 (ru) | Устройство дл измерени мощности, потребл емой лампами накаливани при их испытании на стенде | |
SU143064A1 (ru) | Фотокомпенсационный стабилизатор тока или напр жени дл проверки точных приборов | |
KR910003390A (ko) | 로배터리 검출방법 및 시스템 | |
JPS5724842A (en) | Particle analyzing device | |
SU23279A1 (ru) | Прибор дл измерени напр жени при помощи неоновой лампы | |
SU122812A1 (ru) | Электронный диодный компенсационный вольтметр | |
ATE1117T1 (de) | Schaltungsanordnung zur erzeugung einer pruefspannung. | |
PL76623B2 (es) | ||
JPH0415581A (ja) | 実装回路部品の識別方法及び装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG2A | Definitive protection |
Ref document number: 474439 Country of ref document: ES |