ES2099789T3 - Dispositivo divisor para dividir un primer polinomio por un segundo polinomio. - Google Patents

Dispositivo divisor para dividir un primer polinomio por un segundo polinomio.

Info

Publication number
ES2099789T3
ES2099789T3 ES92202147T ES92202147T ES2099789T3 ES 2099789 T3 ES2099789 T3 ES 2099789T3 ES 92202147 T ES92202147 T ES 92202147T ES 92202147 T ES92202147 T ES 92202147T ES 2099789 T3 ES2099789 T3 ES 2099789T3
Authority
ES
Spain
Prior art keywords
polynomy
inputs
outputs
bit sequence
polynomial
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES92202147T
Other languages
English (en)
Inventor
Der Putten Frank Octaaf Van
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Bell NV
Alcatel Lucent NV
Original Assignee
Alcatel Bell NV
Alcatel NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Bell NV, Alcatel NV filed Critical Alcatel Bell NV
Application granted granted Critical
Publication of ES2099789T3 publication Critical patent/ES2099789T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Complex Calculations (AREA)

Abstract

EL DISPOSITIVO DIVISOR SE UTILIZA EN UNA RED DE TELECOMUNICACIONES DIGITAL PARA DETECTAR LOS ERRORES DE BITS A BASE DE DIVIDIR UN PRIMER POLINOMIO CORRESPONDIENTE A UNA PRIMERA SECUENCIA DE BITS ENTRE UN SEGUNDO POLINOMIO, DENOMINADO UN POLINOMIO GENERADOR, REPRESENTADO POR UNA SEGUNDA SECUENCIA DE BITS. EL DISPOSITIVO LLEVA A CABO, MEDIANTE UN PROCESO ITERATIVO, UNA DIVISION EN PARALELO DE N BITS DE LA PRIMERA SECUENCIA ENTRE LA SEGUNDA, A SABER, N BITS CADA VEZ. INCLUYE UN ELEMENTO DE SUMA A A N PRIMERAS ENTRADAS 17/10 DE LAS CUALES SE APLICAN LOS N BITS Y UN CIRCUITO DIVISOR D A N ENTRADAS DE LAS CUALES N SALIDAS RESPECTIVAS DE A SE VUELVEN A ACOPLAR A TRAVES DE UN CIRCUITO DE REGISTRO R Y N SALIDAS DE LAS DE LAS MISMAS SE ACOPLAN A N SEGUNDAS ENTRADAS DE A. EL RESTO DE LA DIVISION SE GENERA EN N SALIDAS DE R.
ES92202147T 1992-07-14 1992-07-14 Dispositivo divisor para dividir un primer polinomio por un segundo polinomio. Expired - Lifetime ES2099789T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP92202147A EP0582748B1 (en) 1992-07-14 1992-07-14 Divider device to divide a first polynomial by a second one

Publications (1)

Publication Number Publication Date
ES2099789T3 true ES2099789T3 (es) 1997-06-01

Family

ID=8210773

Family Applications (1)

Application Number Title Priority Date Filing Date
ES92202147T Expired - Lifetime ES2099789T3 (es) 1992-07-14 1992-07-14 Dispositivo divisor para dividir un primer polinomio por un segundo polinomio.

Country Status (8)

Country Link
US (1) US5367479A (es)
EP (1) EP0582748B1 (es)
JP (1) JPH06203055A (es)
AT (1) ATE149762T1 (es)
AU (1) AU664459B2 (es)
CA (1) CA2100388A1 (es)
DE (1) DE69217930T2 (es)
ES (1) ES2099789T3 (es)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9419785D0 (en) * 1994-09-30 1994-11-16 Plessey Telecomm Cyclic redundancy code checking
US5615220A (en) * 1995-01-31 1997-03-25 Philips Electronics North America Corporation Polynomial divider which can perform Euclid's Algorithm to produce an error locator polynomial from an error syndrome polynomial, and apparatus including the polynomial divider
US5942002A (en) * 1996-03-08 1999-08-24 Neo-Lore Method and apparatus for generating a transform
US5905664A (en) * 1997-04-04 1999-05-18 National Semiconductor Corp. Circuit for determining, in parallel, the terms of a remainder that results from dividing two binary polynomials
KR100302847B1 (ko) * 1998-09-03 2001-11-22 윤덕용 유한필드에서의긴다항식제산장치
US6968492B1 (en) 2002-03-28 2005-11-22 Annadurai Andy P Hardware-efficient CRC generator for high speed communication networks
JP3579039B2 (ja) * 2002-11-22 2004-10-20 沖電気工業株式会社 巡回符号を用いた誤り訂正回路
KR100731985B1 (ko) * 2005-12-29 2007-06-25 전자부품연구원 파이프라인 구조 병렬 순환 중복 검사 장치 및 방법
US8181269B2 (en) * 2007-11-26 2012-05-22 Exelis, Inc. Night vision goggle mount with retractable stops

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3678469A (en) * 1970-12-01 1972-07-18 Ibm Universal cyclic division circuit
JPS5286011A (en) * 1976-01-12 1977-07-16 Nec Corp Error correction device for parallel processing
US4473902A (en) * 1982-04-22 1984-09-25 Sperrt Corporation Error correcting code processing system
EP0096163B1 (en) * 1982-06-15 1988-06-01 Kabushiki Kaisha Toshiba Apparatus for dividing the elements of a galois field
ATE98030T1 (de) * 1984-01-21 1993-12-15 Sony Corp Verfahren und schaltung zur dekodierung von fehlercode-daten.
US4712215A (en) * 1985-12-02 1987-12-08 Advanced Micro Devices, Inc. CRC calculation machine for separate calculation of checkbits for the header packet and data packet
JPH01150940A (ja) * 1987-12-08 1989-06-13 Hitachi Ltd Ｃｒｃ演算方式
US5136592A (en) * 1989-06-28 1992-08-04 Digital Equipment Corporation Error detection and correction system for long burst errors
US5185711A (en) * 1989-12-08 1993-02-09 Sony Corporation Apparatus for dividing elements of a finite galois field and decoding error correction codes
IT1241429B (it) * 1990-03-01 1994-01-17 Sip Circuito elettronico per la generazione di codici per la rilevazione di errori in segnali numerici
CA2049910C (en) * 1990-08-27 1999-02-09 Yoshihiro Uchida Apparatus for testing atm channels
CA2055172A1 (en) * 1990-12-10 1992-06-11 Joseph H. Condon Error detection and framing in packets transmitted in a sequence of fixed-length cells

Also Published As

Publication number Publication date
AU664459B2 (en) 1995-11-16
EP0582748A1 (en) 1994-02-16
DE69217930T2 (de) 1997-09-25
US5367479A (en) 1994-11-22
AU4173493A (en) 1994-01-20
ATE149762T1 (de) 1997-03-15
JPH06203055A (ja) 1994-07-22
CA2100388A1 (en) 1994-01-15
EP0582748B1 (en) 1997-03-05
DE69217930D1 (de) 1997-04-10

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