ES2078303T3 - Circuito logico y procedimiento operativo del mismo. - Google Patents
Circuito logico y procedimiento operativo del mismo.Info
- Publication number
- ES2078303T3 ES2078303T3 ES90302547T ES90302547T ES2078303T3 ES 2078303 T3 ES2078303 T3 ES 2078303T3 ES 90302547 T ES90302547 T ES 90302547T ES 90302547 T ES90302547 T ES 90302547T ES 2078303 T3 ES2078303 T3 ES 2078303T3
- Authority
- ES
- Spain
- Prior art keywords
- critical
- inputs
- logic circuit
- gate structures
- logic gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
- H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
Abstract
SE DIFUNDE UN METODO Y APARATO PARA REDUCIR EL RETRASO DE LA PROPAGACION, ASOCIADO CON LA RUTA DE VELOCIDAD CRITICA DE UN CIRCUITO LOGICO BINARIO, MEDIANTE EL USO DE "LOGICA DE MULTIPLEXADO". MAS ESPECIFICAMENTE, LAS ENTRADAS AL CIRCUITO LOGICO SE DEFINEN COMO ENTRADAS CRITICAS O NO CRITICAS Y LOS TERMINOS DEL PRODUCTO SE MANIPULAN DE FORMA QUE LAS ENTRADAS NO CRITICAS SON EXCLUSIVAS MUTUAMENTE. LAS ENTRADAS NO CRITICAS SE SUMINISTRAN A UNA O MAS ESTRUCTURAS DE PRIMERA PUERTA LOGICA EN LAS QUE LAS SALIDAS ULTIMAS DE LAS ESTRUCTURAS DE PRIMERA PUERTA LOGICA SE PROPORCIONAN COMO ENTRADA A LOS ACOPLADORES DEL MULTIPLEXOR. LAS ENTRADAS DE VELOCIDAD CRITICA SE SUMINISTRAN A UNA O MAS ESTRUCTURAS DE SEGUNDA PUERTA LOGICA EN LAS QUE LAS SALIDAS ULTIMAS DE LAS ESTRUCTURAS DE LA SEGUNDA PUERTA LOGICA SE PROPORCIONAN COMO ENTRADA A LOS ACOPLADORES DEL MULTIPLEXOR.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/343,623 US4940908A (en) | 1989-04-27 | 1989-04-27 | Method and apparatus for reducing critical speed path delays |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2078303T3 true ES2078303T3 (es) | 1995-12-16 |
Family
ID=23346870
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES90302547T Expired - Lifetime ES2078303T3 (es) | 1989-04-27 | 1990-03-09 | Circuito logico y procedimiento operativo del mismo. |
Country Status (8)
Country | Link |
---|---|
US (1) | US4940908A (es) |
EP (1) | EP0395206B1 (es) |
JP (1) | JP2963936B2 (es) |
AT (1) | ATE127638T1 (es) |
DE (1) | DE69022100T2 (es) |
DK (1) | DK0395206T3 (es) |
ES (1) | ES2078303T3 (es) |
GR (1) | GR3017859T3 (es) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02144674A (ja) * | 1988-11-25 | 1990-06-04 | Fujitsu Ltd | 論理回路シミュレーション装置 |
JPH03260773A (ja) * | 1990-03-09 | 1991-11-20 | Fujitsu Ltd | Lsiの組合せ回路自動合成処理方法 |
US5182473A (en) * | 1990-07-31 | 1993-01-26 | Cray Research, Inc. | Emitter emitter logic (EEL) and emitter collector dotted logic (ECDL) families |
JPH04172011A (ja) * | 1990-11-05 | 1992-06-19 | Mitsubishi Electric Corp | 半導体集積回路 |
US5122685A (en) * | 1991-03-06 | 1992-06-16 | Quicklogic Corporation | Programmable application specific integrated circuit and logic cell therefor |
US5416367A (en) * | 1991-03-06 | 1995-05-16 | Quicklogic Corporation | Programmable application specific integrated circuit and logic cell therefor |
US5250855A (en) * | 1992-03-20 | 1993-10-05 | Vlsi Technology, Inc. | Fast logic circuits |
DE4211162C2 (de) * | 1992-03-31 | 1996-03-21 | Manfred Dipl Ing Zeiner | Hardware-Emulationssystem |
US5519355A (en) * | 1992-11-19 | 1996-05-21 | At&T Global Information Solutions Company | High speed boundary scan multiplexer |
US5592103A (en) * | 1993-10-21 | 1997-01-07 | Sun Microsystems, Inc. | System for fast switching of time critical input signals |
US5574928A (en) * | 1993-10-29 | 1996-11-12 | Advanced Micro Devices, Inc. | Mixed integer/floating point processor core for a superscalar microprocessor with a plurality of operand buses for transferring operand segments |
DE69429061T2 (de) * | 1993-10-29 | 2002-07-18 | Advanced Micro Devices Inc | Superskalarmikroprozessoren |
US5689693A (en) * | 1994-04-26 | 1997-11-18 | Advanced Micro Devices, Inc. | Range finding circuit for selecting a consecutive sequence of reorder buffer entries using circular carry lookahead |
US5764954A (en) * | 1995-08-23 | 1998-06-09 | International Business Machines Corporation | Method and system for optimizing a critical path in a field programmable gate array configuration |
JPH0993118A (ja) * | 1995-09-22 | 1997-04-04 | Kawasaki Steel Corp | パストランジスタ論理回路 |
US6097221A (en) | 1995-12-11 | 2000-08-01 | Kawasaki Steel Corporation | Semiconductor integrated circuit capable of realizing logic functions |
US5689198A (en) * | 1995-12-18 | 1997-11-18 | International Business Machines Corporation | Circuitry and method for gating information |
US5936867A (en) * | 1996-03-14 | 1999-08-10 | Intel Corporation | Method for locating critical speed paths in integrated circuits |
US5856746A (en) * | 1996-06-17 | 1999-01-05 | Sun Microsystems, Inc. | Logic speed-up by selecting true/false combinations with the slowest logic signal |
US6148393A (en) * | 1997-03-10 | 2000-11-14 | Advanced Micro Devices, Inc. | Apparatus for generating a valid mask |
US6269468B1 (en) | 1999-03-02 | 2001-07-31 | International Business Machines Corporation | Split I/O circuit for performance optimization of digital circuits |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4263651A (en) * | 1979-05-21 | 1981-04-21 | International Business Machines Corporation | Method for determining the characteristics of a logic block graph diagram to provide an indication of path delays between the blocks |
US4575646A (en) * | 1983-06-02 | 1986-03-11 | At&T Bell Laboratories | High-speed buffer arrangement with no delay distortion |
US4564772A (en) * | 1983-06-30 | 1986-01-14 | International Business Machines Corporation | Latching circuit speed-up technique |
US4700088A (en) * | 1983-08-05 | 1987-10-13 | Texas Instruments Incorporated | Dummy load controlled multilevel logic single clock logic circuit |
US4641048A (en) * | 1984-08-24 | 1987-02-03 | Tektronix, Inc. | Digital integrated circuit propagation delay time controller |
EP0176938B1 (de) * | 1984-09-28 | 1990-05-23 | Siemens Aktiengesellschaft | Schaltung zur Logikgenerierung mit Multiplexern |
US4737670A (en) * | 1984-11-09 | 1988-04-12 | Lsi Logic Corporation | Delay control circuit |
US4612542A (en) * | 1984-12-20 | 1986-09-16 | Honeywell Inc. | Apparatus for arbitrating between a plurality of requestor elements |
US4698760A (en) * | 1985-06-06 | 1987-10-06 | International Business Machines | Method of optimizing signal timing delays and power consumption in LSI circuits |
US4691124A (en) * | 1986-05-16 | 1987-09-01 | Motorola, Inc. | Self-compensating, maximum speed integrated circuit |
US4833695A (en) * | 1987-09-08 | 1989-05-23 | Tektronix, Inc. | Apparatus for skew compensating signals |
JPH01116690A (ja) * | 1987-10-30 | 1989-05-09 | Fujitsu Ltd | 論理演算回路 |
-
1989
- 1989-04-27 US US07/343,623 patent/US4940908A/en not_active Expired - Lifetime
-
1990
- 1990-03-09 ES ES90302547T patent/ES2078303T3/es not_active Expired - Lifetime
- 1990-03-09 DE DE69022100T patent/DE69022100T2/de not_active Expired - Fee Related
- 1990-03-09 DK DK90302547.6T patent/DK0395206T3/da active
- 1990-03-09 AT AT90302547T patent/ATE127638T1/de not_active IP Right Cessation
- 1990-03-09 EP EP90302547A patent/EP0395206B1/en not_active Expired - Lifetime
- 1990-04-03 JP JP2090079A patent/JP2963936B2/ja not_active Expired - Lifetime
-
1995
- 1995-10-25 GR GR950402963T patent/GR3017859T3/el unknown
Also Published As
Publication number | Publication date |
---|---|
JP2963936B2 (ja) | 1999-10-18 |
GR3017859T3 (en) | 1996-01-31 |
EP0395206A3 (en) | 1991-05-29 |
JPH0364124A (ja) | 1991-03-19 |
US4940908A (en) | 1990-07-10 |
ATE127638T1 (de) | 1995-09-15 |
EP0395206A2 (en) | 1990-10-31 |
EP0395206B1 (en) | 1995-09-06 |
DE69022100T2 (de) | 1996-02-15 |
DE69022100D1 (de) | 1995-10-12 |
DK0395206T3 (da) | 1995-10-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG2A | Definitive protection |
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