ES2070426T3 - Tratamiento de señales de agrupamiento multiple. - Google Patents
Tratamiento de señales de agrupamiento multiple.Info
- Publication number
- ES2070426T3 ES2070426T3 ES91301427T ES91301427T ES2070426T3 ES 2070426 T3 ES2070426 T3 ES 2070426T3 ES 91301427 T ES91301427 T ES 91301427T ES 91301427 T ES91301427 T ES 91301427T ES 2070426 T3 ES2070426 T3 ES 2070426T3
- Authority
- ES
- Spain
- Prior art keywords
- control bus
- bulk storage
- storage memory
- arbitrated
- global bulk
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17356—Indirect interconnection networks
- G06F15/17368—Indirect interconnection networks non hierarchical topologies
- G06F15/17375—One dimensional, e.g. linear array, ring
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
- G06F15/8015—One dimensional arrays, e.g. rings, linear arrays, buses
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Software Systems (AREA)
- Computing Systems (AREA)
- Multi Processors (AREA)
- Bus Control (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Abstract
UNA ARQUITECTURA DE PROCESADOR DE SEÑALES QUE CONSTA DE UNA RED DE DATOS QUE TIENE MULTIPLES PUERTOS, UN BUS DE CONTROL, Y VARIOS GRUPOS PROCESADORES DE SEÑALES CONECTADOS A DOS PUERTOS POR LO MENOS Y AL BUS DE CONTROL. CADA GRUPO PROCESADOR DE SEÑALES TIENE UN PROCESADOR DE CONTROL DEL SISTEMA CONECTADO AL BUS DE CONTROL, UN SEGUNDO BUS DE CONTROL, Y UNA MEMORIA DE ALMACENAMIENTO A GRANEL GLOBAL QUE TIENE MULTIPLES PUERTOS. UNA SERIE DE ELEMENTOS PROCESADORES FUNCIONALES ESTAN CONECTADOS AL PROCESADOR DE CONTROL DEL SISTEMA MEDIANTE EL SEGUNDO BUS DE CONTROL, Y CADA UNO ESTA CONECTADO A UN PUERTO DE LA MEMORIA DE ALMACENAMIENTO A GRANEL GLOBAL. LA MEMORIA DE ALMACENAMIENTO A GRANEL GLOBAL TIENE UNA RED DE SALIDA DE SUBDATOS QUE TIENE MULTIPLES PUERTAS DE SALIDA Y UNA INTERCONECTIVIDAD DE BARRAS CRUZADAS COMPLETA ENTRE CADA UNA DE LAS MULTIPLES PUERTAS DE SALIDA. LA RED DE DATOS Y LA RED DE SALIDA DE SUBDATOS HACEN QUE LOS DATOS SEAN TRANSFERIDOS ENTRE ELEMENTOS PROCESADORES FUNCIONALES ALGRUPO PROCESADOR DE SEÑALES Y CUALQUIER ELEMENTO PROCESADOR FUNCIONAL Y MEMORIA DE ALMACENAMIENTO A GRANEL GLOBAL A OTRO GRUPO PROCESADOR DE SEÑALES, Y PERMITE QUE LOS DATOS SEAN TRANSFERIDOS DESDE CUALQUIER ELEMENTO PROCESADOR FUNCIONAL DENTRO Y FUERA DE LA ARQUITECTURA DEL PROCESADOR. EL PRIMER BUS DE CONTROL ES ARBITRADO PARA ACCEDER A UN MENSAJE POR BASE DE MENSAJE Y LA RED DE DATOS ES ARBITRADA EN UN MENSAJE POR BASE DE MENSAJE PARA LAS TRANSFERENCIAS ENTRE PUERTOS. ESTO DA COMO RESULTADO UN ACOPLAMIENTO BASTANTE FLOJO ENTRE LOS GRUPOS PROCESADORES DE SEÑALES. EL SEGUNDO BUS DE CONTROL ES ARBITRADO PARA ACCEDER SOBRE UNA PALABRA POR BASE DE PALABRA Y LA MEMORIA DE ALMACENAMIENTO A GRANEL GLOBAL ES ARBITRADA PARA ACCEDER AL PUERTO EN CADA CICLO DE LA MEMORIA DE ALMACENAMIENTO A GRANEL GLOBAL. ESTO DA COMO RESULTADO UN ACOPLAMIENTO FUERTE DENTRO DE CADA GRUPO PROCESADOR DE SEÑALES .
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US48698290A | 1990-02-28 | 1990-02-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2070426T3 true ES2070426T3 (es) | 1995-06-01 |
Family
ID=23933911
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES91301427T Expired - Lifetime ES2070426T3 (es) | 1990-02-28 | 1991-02-22 | Tratamiento de señales de agrupamiento multiple. |
Country Status (9)
Country | Link |
---|---|
US (1) | US5392446A (es) |
EP (1) | EP0451938B1 (es) |
JP (1) | JP2558393B2 (es) |
KR (1) | KR940007903B1 (es) |
AU (1) | AU618698B2 (es) |
CA (1) | CA2036688C (es) |
DE (1) | DE69108434T2 (es) |
ES (1) | ES2070426T3 (es) |
IL (1) | IL97315A (es) |
Families Citing this family (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0520284A (ja) * | 1991-07-16 | 1993-01-29 | Matsushita Electric Ind Co Ltd | パラレルプロセツサシステム |
US5428803A (en) * | 1992-07-10 | 1995-06-27 | Cray Research, Inc. | Method and apparatus for a unified parallel processing architecture |
EP0608663B1 (en) * | 1993-01-25 | 1999-03-10 | Bull HN Information Systems Italia S.p.A. | A multi-processor system with shared memory |
JP3176482B2 (ja) * | 1993-07-07 | 2001-06-18 | 富士通株式会社 | 論理シミュレーション装置 |
JP3160149B2 (ja) | 1994-05-13 | 2001-04-23 | 株式会社日立製作所 | ディスク制御装置の無停止プログラム変更方法およびディスク制御装置 |
US5799158A (en) * | 1994-05-31 | 1998-08-25 | International Business Machines Corporation | adapter for transferring blocks of data having a variable size to other adapters via a main system bus |
US5596756A (en) * | 1994-07-13 | 1997-01-21 | Advanced Micro Devices, Inc. | Sub-bus activity detection technique for power management within a computer system |
JPH08235141A (ja) * | 1995-02-28 | 1996-09-13 | Kofu Nippon Denki Kk | 情報処理システム |
JP2731742B2 (ja) * | 1995-02-28 | 1998-03-25 | 甲府日本電気株式会社 | クラスタ構成の並列計算機 |
US5634068A (en) * | 1995-03-31 | 1997-05-27 | Sun Microsystems, Inc. | Packet switched cache coherent multiprocessor system |
US5630161A (en) * | 1995-04-24 | 1997-05-13 | Martin Marietta Corp. | Serial-parallel digital signal processor |
DE69610548T2 (de) * | 1995-07-21 | 2001-06-07 | Koninklijke Philips Electronics N.V., Eindhoven | Multi-media-prozessorarchitektur mit hoher leistungsdichte |
US6151688A (en) | 1997-02-21 | 2000-11-21 | Novell, Inc. | Resource management in a clustered computer system |
US5944822A (en) * | 1997-08-18 | 1999-08-31 | Motorola, Inc. | Channel isolation arrangement and method for dissociated data |
US6038630A (en) * | 1998-03-24 | 2000-03-14 | International Business Machines Corporation | Shared access control device for integrated system with multiple functional units accessing external structures over multiple data buses |
JP2000010913A (ja) * | 1998-06-26 | 2000-01-14 | Sony Computer Entertainment Inc | 情報処理装置および方法、並びに提供媒体 |
US6275891B1 (en) * | 1999-02-25 | 2001-08-14 | Lsi Logic Corporation | Modular and scalable system for signal and multimedia processing |
US6961749B1 (en) | 1999-08-25 | 2005-11-01 | Network Appliance, Inc. | Scalable file server with highly available pairs |
US6738858B1 (en) * | 2000-05-31 | 2004-05-18 | Silicon Labs Cp, Inc. | Cross-bar matrix for connecting digital resources to I/O pins of an integrated circuit |
US6839795B1 (en) * | 2000-05-31 | 2005-01-04 | Silicon Labs Cp, Inc. | Priority cross-bar decoder |
US7171542B1 (en) | 2000-06-19 | 2007-01-30 | Silicon Labs Cp, Inc. | Reconfigurable interface for coupling functional input/output blocks to limited number of i/o pins |
US7346928B1 (en) * | 2000-12-01 | 2008-03-18 | Network Appliance, Inc. | Decentralized appliance virus scanning |
US7778981B2 (en) * | 2000-12-01 | 2010-08-17 | Netapp, Inc. | Policy engine to control the servicing of requests received by a storage server |
US6920545B2 (en) * | 2002-01-17 | 2005-07-19 | Raytheon Company | Reconfigurable processor with alternately interconnected arithmetic and memory nodes of crossbar switched cluster |
US6728150B2 (en) * | 2002-02-11 | 2004-04-27 | Micron Technology, Inc. | Method and apparatus for supplementary command bus |
ES2612779T3 (es) * | 2002-03-11 | 2017-05-18 | Nitto Denko Corporation | Sistema de parches transdérmicos de administración de fármacos, método de fabricación del mismo y método de uso del mismo |
US6857001B2 (en) * | 2002-06-07 | 2005-02-15 | Network Appliance, Inc. | Multiple concurrent active file systems |
US7024586B2 (en) * | 2002-06-24 | 2006-04-04 | Network Appliance, Inc. | Using file system information in raid data reconstruction and migration |
US7961636B1 (en) * | 2004-05-27 | 2011-06-14 | Cisco Technology, Inc. | Vectorized software packet forwarding |
US7694064B2 (en) * | 2004-12-29 | 2010-04-06 | Hewlett-Packard Development Company, L.P. | Multiple cell computer systems and methods |
US7818388B2 (en) * | 2005-10-07 | 2010-10-19 | International Business Machines Corporation | Data processing system, method and interconnect fabric supporting multiple planes of processing nodes |
US7783666B1 (en) | 2007-09-26 | 2010-08-24 | Netapp, Inc. | Controlling access to storage resources by using access pattern based quotas |
US9002972B2 (en) * | 2010-01-29 | 2015-04-07 | Symantec Corporation | Systems and methods for sharing the results of computing operations among related computing systems |
US9552206B2 (en) * | 2010-11-18 | 2017-01-24 | Texas Instruments Incorporated | Integrated circuit with control node circuitry and processing circuitry |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4006466A (en) * | 1975-03-26 | 1977-02-01 | Honeywell Information Systems, Inc. | Programmable interface apparatus and method |
US4644496A (en) * | 1983-01-11 | 1987-02-17 | Iowa State University Research Foundation, Inc. | Apparatus, methods, and systems for computer information transfer |
EP0389001B1 (en) * | 1983-04-25 | 1997-06-04 | Cray Research, Inc. | Computer vector multiprocessing control |
US4901230A (en) * | 1983-04-25 | 1990-02-13 | Cray Research, Inc. | Computer vector multiprocessing control with multiple access memory and priority conflict resolution method |
US4654780A (en) * | 1984-06-05 | 1987-03-31 | Burroughs Corporation | Parallel register transfer mechanism for a reduction processor evaluating programs stored as binary directed graphs employing variable-free applicative language codes |
JPS6115265A (ja) * | 1984-06-27 | 1986-01-23 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | スイツチングシステム |
US4833605A (en) * | 1984-08-16 | 1989-05-23 | Mitsubishi Denki Kabushiki Kaisha | Cascaded information processing module having operation unit, parallel port, and serial port for concurrent data transfer and data processing |
US4837676A (en) * | 1984-11-05 | 1989-06-06 | Hughes Aircraft Company | MIMD instruction flow computer architecture |
JPH07104837B2 (ja) * | 1987-11-25 | 1995-11-13 | 富士通株式会社 | プロセッサの制御方法 |
US5228127A (en) * | 1985-06-24 | 1993-07-13 | Fujitsu Limited | Clustered multiprocessor system with global controller connected to each cluster memory control unit for directing order from processor to different cluster processors |
US4740894A (en) * | 1985-09-27 | 1988-04-26 | Schlumberger Systems And Services, Inc. | Computing processor with memoryless function units each connected to different part of a multiported memory |
JPS62233873A (ja) * | 1986-04-04 | 1987-10-14 | Agency Of Ind Science & Technol | 並列計算機システム |
US5093920A (en) * | 1987-06-25 | 1992-03-03 | At&T Bell Laboratories | Programmable processing elements interconnected by a communication network including field operation unit for performing field operations |
JPH01261772A (ja) * | 1988-04-08 | 1989-10-18 | Cogent Res Inc | コンピュータ及びその動作方法 |
US5041963A (en) * | 1988-12-29 | 1991-08-20 | Intel Corporation | Local area network with an active star topology comprising ring controllers having ring monitor logic function |
US4968977A (en) * | 1989-02-03 | 1990-11-06 | Digital Equipment Corporation | Modular crossbar interconnection metwork for data transactions between system units in a multi-processor system |
US5175824A (en) * | 1989-05-08 | 1992-12-29 | Trw Inc. | Crossbar switch connected modular multiprocessor system with processor timing relationship selected and synchronized to be appropriate for function being performed |
US5123011A (en) * | 1989-09-27 | 1992-06-16 | General Electric Company | Modular multistage switch for a parallel computing system |
-
1991
- 1991-02-20 IL IL9731591A patent/IL97315A/en not_active IP Right Cessation
- 1991-02-20 CA CA002036688A patent/CA2036688C/en not_active Expired - Fee Related
- 1991-02-21 AU AU71272/91A patent/AU618698B2/en not_active Ceased
- 1991-02-22 DE DE69108434T patent/DE69108434T2/de not_active Expired - Fee Related
- 1991-02-22 ES ES91301427T patent/ES2070426T3/es not_active Expired - Lifetime
- 1991-02-22 EP EP91301427A patent/EP0451938B1/en not_active Expired - Lifetime
- 1991-02-27 KR KR1019910003224A patent/KR940007903B1/ko not_active IP Right Cessation
- 1991-02-28 JP JP3059590A patent/JP2558393B2/ja not_active Expired - Lifetime
-
1993
- 1993-02-11 US US08/017,362 patent/US5392446A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0451938A2 (en) | 1991-10-16 |
KR920000024A (ko) | 1992-01-10 |
IL97315A (en) | 1994-10-07 |
DE69108434D1 (de) | 1995-05-04 |
EP0451938B1 (en) | 1995-03-29 |
JP2558393B2 (ja) | 1996-11-27 |
AU7127291A (en) | 1991-08-29 |
DE69108434T2 (de) | 1995-08-31 |
KR940007903B1 (ko) | 1994-08-27 |
IL97315A0 (en) | 1992-05-25 |
CA2036688C (en) | 1995-01-03 |
JPH04218861A (ja) | 1992-08-10 |
US5392446A (en) | 1995-02-21 |
AU618698B2 (en) | 1992-01-02 |
EP0451938A3 (en) | 1993-01-27 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG2A | Definitive protection |
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