ES2056800T3 - Circuito que combina un generador de codigo de verificacion de redundancia ciclica y un generador de numero pseudoaleatorio. - Google Patents

Circuito que combina un generador de codigo de verificacion de redundancia ciclica y un generador de numero pseudoaleatorio.

Info

Publication number
ES2056800T3
ES2056800T3 ES87110901T ES87110901T ES2056800T3 ES 2056800 T3 ES2056800 T3 ES 2056800T3 ES 87110901 T ES87110901 T ES 87110901T ES 87110901 T ES87110901 T ES 87110901T ES 2056800 T3 ES2056800 T3 ES 2056800T3
Authority
ES
Spain
Prior art keywords
pseudo
circuit
random number
generator
combines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES87110901T
Other languages
English (en)
Inventor
Charles Lawrence Davis
James Allen Rench
Jerry Ray Sanders
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Abbott Laboratories
Original Assignee
Abbott Laboratories
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Abbott Laboratories filed Critical Abbott Laboratories
Application granted granted Critical
Publication of ES2056800T3 publication Critical patent/ES2056800T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/84—Generating pulses having a predetermined statistical distribution of a parameter, e.g. random pulse generators

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Detection And Correction Of Errors (AREA)
  • Stereo-Broadcasting Methods (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

SE TRATA DE UN CIRCUITO QUE COMBINA LAS FUNCIONES DE UN GENERADOR DE CODIGO DE COMPROBACION POR REDUNDANCIA CICLICA (GCRC), Y UN GENERADOR DE NUMEROS PSEUDO-ALEATORIOS, DE FORMA QUE LOS ELEMENTOS COMUNES SEAN COMPARTIDOS EN VEZ DE DUPLICARLOS. PARA LOS GENERADORES GCRC Y DE NUMEROS PSEUDO-ALEATORIOS, SE INCLUYEN UN REGISTRO DE DESPLAZAMIENTO DE 16 ETAPAS, Y DOS VIAS DE REALIMENTACION. UNA SECCION DE CONTROL DEL CIRCUITO, CONTROLA SU MODO DE OPERACION DE ACUERDO CON EL ESTADO DE UNA SEÑAL DE CONTROL MODAL. UNA SEÑAL EN UNA LINEA DE BORRADO LIMPIA EL REGISTRO DE DESPLAZAMIENTO O LO INICIALIZA A UN VALOR SELECCIONADO, DEPENDIENDO DEL ESTADO DE LA SEÑAL DE CONTROL MODAL. LA SEÑAL DE CONTROL MODAL TAMBIEN CONTROLA LA ENTRADA DE DATOS EN LA LINEA DE DATOS Y LA SALIDA GENERADA DE CODIGOS DE ACCESO CCR Y DE NUMEROS PSEUDO-ALEATORIOS, EN LAS LINEAS DE SALIDA.
ES87110901T 1986-09-18 1987-07-28 Circuito que combina un generador de codigo de verificacion de redundancia ciclica y un generador de numero pseudoaleatorio. Expired - Lifetime ES2056800T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/908,541 US4771429A (en) 1986-09-18 1986-09-18 Circuit combining functions of cyclic redundancy check code and pseudo-random number generators

Publications (1)

Publication Number Publication Date
ES2056800T3 true ES2056800T3 (es) 1994-10-16

Family

ID=25425950

Family Applications (1)

Application Number Title Priority Date Filing Date
ES87110901T Expired - Lifetime ES2056800T3 (es) 1986-09-18 1987-07-28 Circuito que combina un generador de codigo de verificacion de redundancia ciclica y un generador de numero pseudoaleatorio.

Country Status (8)

Country Link
US (1) US4771429A (es)
EP (1) EP0260413B1 (es)
JP (1) JPS6378609A (es)
AT (1) ATE96588T1 (es)
AU (1) AU590449B2 (es)
CA (1) CA1265252A (es)
DE (1) DE3787946T2 (es)
ES (1) ES2056800T3 (es)

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JPH02125532A (ja) * 1988-11-04 1990-05-14 Sony Corp Ｂｃｈ符号の復号装置
US4959832A (en) * 1988-12-09 1990-09-25 International Business Machines Parallel pseudorandom pattern generator with varying phase shift
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US4978955A (en) * 1989-11-09 1990-12-18 Archive Corporation Data randomizing/de-randomizing circuit for randomizing and de-randomizing data
US5412665A (en) * 1992-01-10 1995-05-02 International Business Machines Corporation Parallel operation linear feedback shift register
US5222141A (en) * 1992-03-25 1993-06-22 Motorola, Inc. Apparatus and method for encoding data
US5222142A (en) * 1992-06-22 1993-06-22 Hughes Aircraft Company Sequence generator
US5301247A (en) * 1992-07-23 1994-04-05 Crest Industries, Inc. Method for ensuring secure communications
US5258936A (en) * 1992-08-05 1993-11-02 Motorola, Inc. Method and apparatus for generating pseudo-random numbers
US5416783A (en) * 1993-08-09 1995-05-16 Motorola, Inc. Method and apparatus for generating pseudorandom numbers or for performing data compression in a data processor
US5455862A (en) * 1993-12-02 1995-10-03 Crest Industries, Inc. Apparatus and method for encrypting communications without exchanging an encryption key
US5606322A (en) * 1994-10-24 1997-02-25 Motorola, Inc. Divergent code generator and method
JP2762941B2 (ja) * 1994-12-06 1998-06-11 日本電気株式会社 背景雑音発生装置
US6298360B1 (en) * 1995-05-26 2001-10-02 Sun Microsystems, Inc. Method and apparatus for generating a highly random number while using existing circuitry
GB2302634A (en) * 1995-06-24 1997-01-22 Motorola Ltd Cyclic redundancy coder
DE19547902B4 (de) * 1995-12-21 2007-10-18 Institut für Rundfunktechnik GmbH Verfahren zum Durchführen eines elektronischen Spiels
US5856194A (en) 1996-09-19 1999-01-05 Abbott Laboratories Method for determination of item of interest in a sample
US5795784A (en) 1996-09-19 1998-08-18 Abbott Laboratories Method of performing a process for determining an item of interest in a sample
DE19821004C2 (de) 1998-05-11 2000-03-23 Ericsson Telefon Ab L M Sequenzgenerator
KR100611955B1 (ko) * 1999-07-20 2006-08-11 삼성전자주식회사 스크램블러
US6631390B1 (en) 2000-03-06 2003-10-07 Koninklijke Philips Electronics N.V. Method and apparatus for generating random numbers using flip-flop meta-stability
US7627116B2 (en) * 2000-09-26 2009-12-01 King Green Ltd. Random data method and apparatus
US7739409B2 (en) * 2000-09-26 2010-06-15 King Green Ltd. System and method for making available identical random data to seperate and remote parties
US6665760B1 (en) 2000-09-29 2003-12-16 Rockwell Automation Technologies, Inc. Group shifting and level shifting rotational arbiter system
US6883132B1 (en) 2000-09-29 2005-04-19 Rockwell Automation Technologies, Inc. Programmable error checking value circuit and method
US6714144B1 (en) * 2000-10-23 2004-03-30 Cirrus Logic, Inc. Data randomization in a data storage system
US6748522B1 (en) * 2000-10-31 2004-06-08 International Business Machines Corporation Performance monitoring based on instruction sampling in a microprocessor
US7421637B1 (en) * 2003-01-16 2008-09-02 Cisco Technology, Inc. Generating test input for a circuit
US7712009B2 (en) 2005-09-21 2010-05-04 Semiconductor Energy Laboratory Co., Ltd. Cyclic redundancy check circuit and semiconductor device having the cyclic redundancy check circuit
JP2007304998A (ja) * 2006-05-12 2007-11-22 Hitachi Software Eng Co Ltd ソースコード生成方法及び装置並びにプログラム
US8281111B2 (en) * 2008-09-23 2012-10-02 Qualcomm Incorporated System and method to execute a linear feedback-shift instruction
US8612842B2 (en) * 2011-05-25 2013-12-17 Infineon Technologies Ag Apparatus for generating a checksum
CN110597488A (zh) * 2018-06-12 2019-12-20 华邦电子股份有限公司 随机数产生器以及随机数产生方法
CN117706260B (zh) * 2024-02-06 2024-04-30 禹创半导体(深圳)有限公司 Esd事件检测方法

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Also Published As

Publication number Publication date
ATE96588T1 (de) 1993-11-15
AU7861387A (en) 1988-03-24
AU590449B2 (en) 1989-11-02
JPS6378609A (ja) 1988-04-08
EP0260413B1 (en) 1993-10-27
EP0260413A2 (en) 1988-03-23
DE3787946T2 (de) 1994-04-07
DE3787946D1 (de) 1993-12-02
CA1265252A (en) 1990-01-30
US4771429A (en) 1988-09-13
EP0260413A3 (en) 1991-03-27

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