ES2008185A6 - Procedimiento y disposicion para la transmision segura desde el punto de vista de la tecnica de senales de datos seriados entre ordenadores seguros que trabajan preferentemente con dos canales con utilizacion de un sistema de canal de doble anillo. - Google Patents

Procedimiento y disposicion para la transmision segura desde el punto de vista de la tecnica de senales de datos seriados entre ordenadores seguros que trabajan preferentemente con dos canales con utilizacion de un sistema de canal de doble anillo.

Info

Publication number
ES2008185A6
ES2008185A6 ES8702453A ES8702453A ES2008185A6 ES 2008185 A6 ES2008185 A6 ES 2008185A6 ES 8702453 A ES8702453 A ES 8702453A ES 8702453 A ES8702453 A ES 8702453A ES 2008185 A6 ES2008185 A6 ES 2008185A6
Authority
ES
Spain
Prior art keywords
bus
data
secure
buses
control station
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES8702453A
Other languages
English (en)
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Licentia Patent Verwaltungs GmbH
Original Assignee
Licentia Patent Verwaltungs GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Licentia Patent Verwaltungs GmbH filed Critical Licentia Patent Verwaltungs GmbH
Publication of ES2008185A6 publication Critical patent/ES2008185A6/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1608—Error detection by comparing the output signals of redundant hardware
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42—Loop networks
    • H04L12/437—Ring fault isolation or reconfiguration

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
ES8702453A 1986-08-21 1987-08-21 Procedimiento y disposicion para la transmision segura desde el punto de vista de la tecnica de senales de datos seriados entre ordenadores seguros que trabajan preferentemente con dos canales con utilizacion de un sistema de canal de doble anillo. Expired ES2008185A6 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19863628299 DE3628299A1 (de) 1986-08-21 1986-08-21 Verfahren und anordnung zum signaltechnisch sicheren uebertragen von seriellen daten zwischen vorzugsweise zweikanaligen sicheren rechnern unter verwendung eines doppelringbussystems

Publications (1)

Publication Number Publication Date
ES2008185A6 true ES2008185A6 (es) 1989-07-16

Family

ID=6307818

Family Applications (1)

Application Number Title Priority Date Filing Date
ES8702453A Expired ES2008185A6 (es) 1986-08-21 1987-08-21 Procedimiento y disposicion para la transmision segura desde el punto de vista de la tecnica de senales de datos seriados entre ordenadores seguros que trabajan preferentemente con dos canales con utilizacion de un sistema de canal de doble anillo.

Country Status (8)

Country Link
EP (1) EP0279831B1 (enExample)
CA (1) CA1294683C (enExample)
DE (2) DE3628299A1 (enExample)
DK (1) DK158988A (enExample)
ES (1) ES2008185A6 (enExample)
FI (1) FI880883A0 (enExample)
HU (1) HUT51010A (enExample)
WO (1) WO1988001410A2 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3826821C2 (de) * 1988-08-06 1996-03-07 Asea Brown Boveri Schaltungsanordnung zur Busüberwachung
DE4041235C1 (en) * 1990-12-19 1992-02-20 Aeg Westinghouse Transport-Systeme Gmbh, 1000 Berlin, De Double ring bus system - has two buses which normally operate in parallel or are cross-coupled for testing to identify failure
JP3172387B2 (ja) * 1994-06-01 2001-06-04 インターナショナル・ビジネス・マシーンズ・コーポレ−ション 入出力通信サブシステム及び方法
DE19509558A1 (de) * 1995-03-16 1996-09-19 Abb Patent Gmbh Verfahren zur fehlertoleranten Kommunikation unter hohen Echtzeitbedingungen
DE19922171B4 (de) * 1999-05-12 2009-08-27 Infineon Technologies Ag Kommunikationssystem mit einem Kommunikationsbus
DE19935192A1 (de) * 1999-07-27 2001-02-22 Moeller Gmbh Adressierung von Teilnehmern eines Bussystems
DE102004020830B4 (de) 2004-02-19 2010-06-10 Lenze Automation Gmbh Sicherheits-Schaltungsverbund mit Ringkonzept für Steuergeräte der Leistungselektronik
US20060206657A1 (en) * 2005-03-10 2006-09-14 Clark Scott D Single port/multiple ring implementation of a hybrid crossbar partially non-blocking data switch
US7389459B2 (en) * 2005-03-22 2008-06-17 Arm Limited Provision of debug via a separate ring bus in a data processing apparatus
US7293212B2 (en) * 2005-03-22 2007-11-06 Arm Limted Memory self-test via a ring bus in a data processing apparatus
DE102005035611C5 (de) * 2005-07-29 2014-05-15 Diehl Aerospace Gmbh Busarchitektur sowie Verfahren zum Datenaustausch
US8503482B2 (en) * 2008-11-19 2013-08-06 Lsi Corporation Interconnects using self-timed time-division multiplexed bus
DE102011007049A1 (de) * 2011-04-08 2012-10-11 Siemens Ag Österreich Verfahren zur raschen Notabschaltung von verteilten Anlagen und zugehörige Vorrichtung

Also Published As

Publication number Publication date
CA1294683C (en) 1992-01-21
WO1988001410A2 (fr) 1988-02-25
WO1988001410A3 (en) 1988-04-07
DE3628299C2 (enExample) 1988-12-01
HUT51010A (en) 1990-03-28
FI880883A7 (fi) 1988-02-25
EP0279831A1 (de) 1988-08-31
DE3628299A1 (de) 1988-02-25
FI880883A0 (fi) 1988-02-25
DK158988A (da) 1988-04-20
EP0279831B1 (de) 1990-10-10
DK158988D0 (da) 1988-03-23
DE3765539D1 (de) 1990-11-15

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Legal Events

Date Code Title Description
SA6 Expiration date (snapshot 920101)

Free format text: 2007-08-21