EP3984126A1 - Redresseur pour signaux de tension alternative à ondes millimétriques - Google Patents

Redresseur pour signaux de tension alternative à ondes millimétriques

Info

Publication number
EP3984126A1
EP3984126A1 EP20733249.5A EP20733249A EP3984126A1 EP 3984126 A1 EP3984126 A1 EP 3984126A1 EP 20733249 A EP20733249 A EP 20733249A EP 3984126 A1 EP3984126 A1 EP 3984126A1
Authority
EP
European Patent Office
Prior art keywords
rectifier
field effect
transistor
effect transistor
rectifier cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP20733249.5A
Other languages
German (de)
English (en)
Inventor
Armen Harutyunyan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Original Assignee
Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV filed Critical Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Publication of EP3984126A1 publication Critical patent/EP3984126A1/fr
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J50/00Circuit arrangements or systems for wireless supply or distribution of electric power
    • H02J50/20Circuit arrangements or systems for wireless supply or distribution of electric power using microwaves or radio frequency waves
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0701Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management
    • G06K19/0707Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management the arrangement being capable of collecting energy from external energy sources, e.g. thermocouples, vibration, electromagnetic radiation
    • G06K19/0708Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management the arrangement being capable of collecting energy from external energy sources, e.g. thermocouples, vibration, electromagnetic radiation the source being electromagnetic or magnetic
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0701Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management
    • G06K19/0715Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management the arrangement including means to regulate power transfer to the integrated circuit
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0723Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M7/25Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only arranged for operation in series, e.g. for multiplication of voltage
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0701Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management
    • G06K19/0713Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management the arrangement including a power charge pump

Definitions

  • the invention relates to a rectifier for rectifying an electrical alternating voltage, in particular for alternating voltage signals with a carrier frequency in the millimeter waveband.
  • the task of a rectifier is to convert an AC voltage into a DC voltage, e.g. B. to ensure a supply of a passive transponder or electronic components located on it with electrical energy.
  • the alternating voltage required for this is often provided by electromagnetic waves that are emitted by a reader in the direction of an antenna located on the transponder.
  • the electronic circuit of the rectifier is arranged between the antenna, which receives an alternating voltage signal, and the electronic components of the transponder to be supplied with the direct voltage.
  • Using alternating voltage signals with a carrier frequency in the millimeter waveband enables efficient on-chip integration of all components, including the antenna, and is therefore of great advantage for many mobile applications.
  • Increased signal losses in the millimeter waveband can have a disadvantage.
  • B. by increased free space attenuation, which is proportional to the square of the carrier frequency. For example, at the same distance, the loss of free space at a carrier frequency of 61 GHz is 37 dB higher than at a carrier frequency of 850 MHz. Dielectric losses also increase because they are directly proportional to the carrier frequency. Furthermore, the on-chip integration of the antenna increases the losses caused by parasitic excitation of surface modes of the substrate.
  • One way of increasing the efficiency of a rectifier is to effectively compensate for the threshold voltage of the transistors in order to convert the source-drain current into a moderate inversion range for a given AC input voltage.
  • an auxiliary charge pump coupled to the electrodes of the transistors for the purpose of threshold voltage compensation is proposed.
  • the auxiliary charge pump uses the power of the input signal to generate a switching voltage.
  • this solution limits the power and the efficiency of the rectifier, since part of the input power is used to operate the auxiliary charge pump.
  • the large number of active and passive components with which the auxiliary charge pump is formed increase the manufacturing costs and cause further signal loss.
  • the object of the invention is therefore to propose an electronic circuit for a rectifier cell which has a high degree of efficiency and can be manufactured cost-effectively.
  • the object is achieved by a rectifier cell with the features mentioned in claim 1.
  • Advantageous variants result from the features mentioned in the subclaims.
  • the rectifier cell according to the invention for rectifying an electrical AC voltage comprises a transistor series circuit with a first field effect transistor and a second field effect transistor, a node arranged between the first and the second field effect transistor being connected via an input capacitor to an input node at which an electrical AC voltage can be applied .
  • a first frequency-independent voltage divider connected in parallel to the transistor series circuit has a first node connected to the gate electrode of the first field-effect transistor.
  • a second frequency-independent voltage divider connected in parallel to the transistor series circuit has a second node connected to the gate electrode of the second field effect transistor.
  • the first and second nodes of the frequency-independent voltage dividers are each also connected to ground via a bias capacitor.
  • the field effect transistors of the transistor series circuit are advantageously arranged in a cascaded manner with regard to their respective forward current direction. Cascading can be designed such that the drain electrode of the first field effect transistor is connected to the drain electrode of the second field effect transistor.
  • the node of the transistor series circuit which is connected to the input node via the input capacitor can be arranged between the drain electrode of the first field effect transistor and the drain electrode of the second field effect transistor.
  • the DC voltage applied between the two source electrodes of the field effect transistors of the transistor series circuit can then be used to supply an application, preferably to supply a load resistor. stand exhibiting load.
  • the source electrode of the first field effect transistor can be connected to ground, that is to say to an electrical zero potential, via a first output node.
  • the source electrode of the second field effect transistor can with a load and / or egg
  • frequency-independent voltage divider effectively increases the input impedance and thus also the efficiency of the rectifier.
  • a frequency-independent voltage divider with at least two series-connected biasing resistors which are used as components
  • the bias resistors are particularly preferably designed as ohmic resistors.
  • the bias resistors which are designed as components, can be configured as noble metal layer resistors or as metal oxide layer resistors or as SMD components (surface mounted device) that can be arranged directly on a substrate
  • a frequency-independent voltage divider apart from the electronic lines that connect the components to one another, is not formed with any other components.
  • threshold voltage compensation is implemented using particularly simple and inexpensive means to be produced.
  • the optimal ratio of the ohmic resistances of the at least two series-connected biasing resistors depends, among other things, on the load to be supplied, which has a load resistance, the input power of the AC voltage signal, the threshold voltage and the DC voltage to be achieved and can be determined by a numerical simulation of the electronic circuit .
  • the compensation of a threshold voltage can increase the efficiency of the rectifier cell, but at the same time it also reduces the available direct voltage.
  • the ohmic resistances of the bias resistors can be selected so that the DC voltage achieved by the rectifier cell is sufficient to supply a specified load and, at the same time, the efficiency is higher than that of a rectifier cell which is formed with the transistor series circuit without frequency-independent voltage dividers connected in parallel.
  • the ratio of the ohmic resistances of the at least two series-connected biasing resistors, which are designed as components of a frequency-independent voltage divider, can be selected so that the threshold voltage of a field effect transistor, the gate electrode of which is connected to the node of the frequency-independent voltage divider, is almost completely is compensated.
  • the threshold voltage is almost completely compensated if it is less than 10% (compensation of the threshold voltage is 90%), preferably less than 5% (compensation of the threshold voltage is 95%), of the original threshold voltage.
  • At least one bias resistor of a frequency-independent voltage divider can have an ohmic resistance of at least 10 kOhm, preferably of at least 100 kOhm, to limit the current flowing through the frequency-independent voltage divider. All of the bias resistors of the rectifier cell can have an ohmic resistance of at least 10 kOhm, preferably of at least 100 kOhm.
  • the bias capacitors are used to filter out high-frequency signal components and thereby effectively contribute to smoothing the DC voltage made available by the rectifier cell.
  • at least one bias capacitor can have a capacitance of at least 1 pF. All bias capacitors can also have a capacitance of at least 1 pF.
  • the capacitances of the bias capacitors are particularly advantageously chosen so that the RC constants formed with the ohmic resistances of the bias resistors are large enough to use the bias capacitors to filter out signal components whose frequency at least approximately corresponds to the carrier frequency of the AC voltage signal.
  • the rectifier cell can be arranged on a substrate in particular by means of integrated silicon-on-insulator (SOI) technology.
  • the transistor series circuit of the rectifier cell can be formed with an n-channel metal-oxide-semiconductor transistor (NMOS) and a p-channel metal-oxide-semiconductor transistor (PMOS), the NMOS transistor and the PMOS Transistor with respect to their respective forward current direction are cascaded.
  • NMOS metal-oxide-semiconductor transistor
  • PMOS metal-oxide-semiconductor transistor
  • the first field effect transistor can be formed with an NMOS transistor
  • the second field effect transistor can be formed with a PMOS transistor.
  • Cascading can then be configured such that the drain electrode of the NMOS transistor is connected to the drain electrode of the PMOS transistor via a node that is connected to the input node via the input capacitor.
  • One advantage of SOI technology results from the lack of source-bulk and drain-bulk diodes that limit the signal losses caused by the substrate.
  • the input capacitor can advantageously be formed with a metal-oxide-metal capacitor (MOM). It is advisable to design the MOM capacitor in particular in different layers of a coating on the substrate and / or the substrate. For better shielding from the substrate, the MOM capacitor can be provided with an additional coating that is applied to a polysilicon layer and / or diffusion layer of the MOM Capacitor can be arranged to be formed. Such a construction of the input capacitor allows signal losses caused by the substrate, for example parasitic capacitances, to be limited.
  • MOM metal-oxide-metal capacitor
  • the threshold voltage can also be modulated or compensated via the bulk connections of the field effect transistors with the aid of an auxiliary charge pump.
  • a rectifier then comprises at least one rectifier cell and at least one auxiliary charge pump.
  • the bulk connections of the field effect transistors are advantageously connected to the output node of the auxiliary charge pump.
  • the auxiliary charge pump can also be gebil det using SOI technology.
  • a DC voltage of up to 2 V applied to the output node of the auxiliary charge pump can be achieved.
  • This output voltage can then also contribute to the compensation of the threshold voltage via the bulk connections of the rectifier cell.
  • the auxiliary charge pump can be coupled to an oscillator for periodic switching of the switches of the auxiliary charge pump.
  • the oscillator can have a low switching frequency in the range from kHz to MHz.
  • an electrode of a field effect transistor preferably a source electrode of a field effect transistor
  • a storage capacitor can be connected.
  • the capacity of the storage capacitor can be more than 5 nF.
  • the settling time can be a few 100 microseconds, preferably less than 500 ps.
  • a plurality of rectifier cells can also be coupled to one another in an electronic circuit which forms a rectifier, a rectifier cell forming one stage of the rectifier and the rectifier being formed from several stages.
  • two rectifier cells can be coupled so that a source electrode of a second field effect transistor of a first rectifier cell is connected to the source electrode of a first field effect transistor of a second rectifier cell.
  • the source electrode of the first field effect transistor of the first rectifier cell can be connected to ground.
  • the source electrode of the second field effect transistor of the second rectifier cell can be connected to a storage capacitor and / or to a load.
  • Further rectifier cells can also be arranged between the first and the second rectifier cell, a source electrode of a second field effect transistor of the first or another rectifier cell being connected to a source electrode of a first field effect transistor of a further or the second rectifier cell.
  • the rectifier formed with a plurality of rectifier cells can provide a DC voltage which results from the addition of the DC voltage generated by each rectifier cell.
  • Each rectifier cell has only part of the input power of an AC voltage signal applied to the input node.
  • the effective total impedance of several coupled rectifier cells is inversely proportional to the number of coupled rectifier cells for a given load resistance and a given input power.
  • the number of coupled rectifier cells for a given load and a given AC voltage signal thus also forms an optimization parameter.
  • This optimization parameter can also be determined by a numerical simulation of the electronic circuit forming the rectifier.
  • the rectifier cell according to the invention can be used in particular in the field of RFID technology.
  • the AC voltage signal can have a carrier frequency in the millimeter waveband, that is between BO GHz and 300 GHz.
  • a carrier frequency can preferably be greater than 50 GHz.
  • the carrier frequency is particularly preferably 60 GHz or 61 GHz.
  • the rectifier cell according to the invention can also be used to rectify AC voltage signals with a carrier frequency that is less than 30 GHz.
  • a rectifier formed with at least two coupled rectifier cells can be integrated in an RFID transponder in order to rectify an AC voltage signal with a frequency of at least 50 GHz and an average available at the input node for a load with a load resistance of at least 20 kOhm Power between -5 dBm and -1 dBm has to provide a rectified supply voltage.
  • three or more rectifier cells can also be coupled to one another as stages of a rectifier.
  • a load can also be formed by an effective load of a passive or active circuit, which can comprise several electronic components.
  • Figure 1 is a schematic illustration of an electronic circuit showing a rectifier cell according to the invention.
  • FIG. 2 shows a schematic illustration of an electronic circuit which shows a rectifier according to the invention formed with a plurality of rectifier cells.
  • FIG. 1 shows a rectifier cell 1 with a transistor series circuit which has a first field effect transistor 2 designed as an NMOS transistor, the has a bulk connection 9, and a second field effect transistor S formed as a PMOS transistor and having a bulk connection 10 shows.
  • the drain electrode of the first field effect transistor 2 is connected to the drain electrode of the second field effect transistor 3 via a node, the node being connected to the input node 5 via an input capacitor 4 formed as a MOM capacitor.
  • the NMOS transistor 2 and the PMOS transistor 3 form a transistor series circuit cascaded in the conducting direction.
  • an AC voltage signal with a carrier frequency in the millimeter waveband that is greater than 50 GHz can be present at the input node 5.
  • the source electrode of the NMOS transistor 2 is via a first frequency-independent voltage divider 6, which is formed with two series-connected bias resistors 6.1, 6.2, and a second frequency-independent voltage divider 7, which also has two series-connected bias resistors 7.1, 7.2 is formed, connected to the source electrode of the PMOS transistor 3. Both the first and the second frequency-independent voltage divider 6, 7 are arranged in parallel with the transistor series scarf device.
  • the bias resistors 6.1, 6.2, 7.1, 7.2 are each designed as a component with an ohmic resistance of more than 10 kOhm.
  • a first node arranged between the two biasing resistors 6.1, 6.2 of the first frequency-independent voltage divider 6 is connected to the gate electrode of the NMOS transistor 2 and connected to ground via a biasing capacitor 8.1 with a capacitance of 1 pF.
  • a second node arranged between the two biasing resistors 7.1, 7.2 of the second frequency-independent voltage divider 7 is connected to the gate electrode of the PMOS transistor 3 and connected to ground via a biasing capacitor 8.2 with a capacitance of 1 pF.
  • the DC voltage applied to the output nodes 11, 12 can be used as supply voltage from an application, e.g. can be used by a load having a power resistance.
  • Figure 2 shows a rectifier, which is connected to several rectifier cells 1, an auxiliary charge pump 13 with the output nodes 13.1, 13.2, egg nem oscillator 14 and a storage capacitor 16 is formed. Recurring features are given the same reference numerals in this figure as in FIG.
  • the storage capacitor 16 has a capacitance of 6.2 nF.
  • a load 15 can be connected to the source electrode of a PMOS transistor and / or to the output node 12.
  • the rectifier cells 1 are connected to the input node 5 in such a way that the input power of each rectifier cell 1 corresponds to at least part of the input power of an AC voltage signal present at the input node 5.
  • the rectifier cells 1 are coupled to one another so that a source electrode of the NMOS transistor 2 of a first rectifier cell 1 is connected to ground and a source electrode of the PMOS transistor 3 of a second rectifier cell 1 is connected to the storage capacitor 16. Further rectifier cells 1 can be arranged between the first and the second rectifier cell 1.
  • the bulk connections 9, 10 of the rectifier cells 1 are connected to the output nodes 13.1, 13.2 of the auxiliary charge pump 13.
  • the oscillator 14 regulates the charge transfer of the auxiliary charge pump 13 by periodic switching of at least one switch of the auxiliary charge pump 13.
  • the use of an auxiliary charge pump 13 controlled by an oscillator 14 also makes it possible to effectively compensate the threshold voltage.
  • the number of coupled rectifier cells 1 can be selected as a function of the load resistance of the load 15 and the input power of the AC voltage signal applied to the input node 5.
  • the rectifier shown in Figure 2 for an AC voltage signal with a carrier frequency of 61 GHz and an input power between -5 dBm and -1 dBm and a load resistance of 10 kOhm with two coupled rectifier cells 1 be formed.
  • the efficiency of the rectifier can be greater than 2% and the DC voltage achieved can be more than 300 mV.
  • With a load resistance of 50 kOhm however, it is advisable to form a rectifier with three coupled rectifier cells 1.
  • the efficiency of the rectifier can be greater than 0.7% and the DC voltage achieved can be more than 400 mV.
  • At a Load resistance of 1 kOhm and an input power of 5.2 dBm can even be achieved with the rectifier according to the invention efficiencies of more than 6%.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Electromagnetism (AREA)
  • Rectifiers (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

L'invention concerne un élément redresseur (1) conçu pour redresser une tension électrique alternative, comprenant un circuit en série de transistors lequel comporte un premier transistor à effet de champ (2) et un deuxième transistor à effet de champ (3). Un premier diviseur de tension (6) fonctionnant indépendamment de la fréquence et monté parallèlement au circuit en série de transistors comprend un premier nœud qui est relié à l'électrode de grille du premier transistor à effet de champ (2). Un deuxième diviseur de tension (7) fonctionnant indépendamment de la fréquence et monté parallèlement au circuit en série de transistors comprend un deuxième nœud qui est relié à l'électrode de grille du deuxième transistor à effet de champ (3). Le premier et le deuxième nœud des diviseurs de tension (6, 7) fonctionnant indépendamment de la fréquence sont reliés à masse, aussi respectivement par l'intermédiaire d'un condensateur à prétension (8.1, 8.2).
EP20733249.5A 2019-06-13 2020-06-12 Redresseur pour signaux de tension alternative à ondes millimétriques Pending EP3984126A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102019208582.2A DE102019208582A1 (de) 2019-06-13 2019-06-13 Gleichrichter für Millimeter-Wellen-Wechselspannungssignale
PCT/EP2020/066337 WO2020249753A1 (fr) 2019-06-13 2020-06-12 Redresseur pour signaux de tension alternative à ondes millimétriques

Publications (1)

Publication Number Publication Date
EP3984126A1 true EP3984126A1 (fr) 2022-04-20

Family

ID=71096701

Family Applications (1)

Application Number Title Priority Date Filing Date
EP20733249.5A Pending EP3984126A1 (fr) 2019-06-13 2020-06-12 Redresseur pour signaux de tension alternative à ondes millimétriques

Country Status (4)

Country Link
US (1) US20220247323A1 (fr)
EP (1) EP3984126A1 (fr)
DE (1) DE102019208582A1 (fr)
WO (1) WO2020249753A1 (fr)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6061551A (en) * 1998-10-21 2000-05-09 Parkervision, Inc. Method and system for down-converting electromagnetic signals
US6968167B1 (en) * 1999-10-21 2005-11-22 Broadcom Corporation Adaptive radio transceiver with calibration
DE102008049648A1 (de) * 2008-09-30 2010-04-15 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Vorrichtung und Verfahren zur Gleichrichtung einer Eingangswechselspannung
US9000835B1 (en) * 2013-03-14 2015-04-07 Impinj, Inc. Hot RF rectifiers for RFID applications
US9594997B1 (en) 2015-08-17 2017-03-14 Em Microelectronic-Marin Sa Auxiliary charge pump for a rectifier of an RFID transponder
US11277065B2 (en) * 2016-11-23 2022-03-15 Eta-Bar Ltd. Power supply with controlled shunting element
US10355615B2 (en) * 2017-03-30 2019-07-16 Lapis Semiconductor Co., Ltd. Rectifier circuit for opposite-phase currents

Also Published As

Publication number Publication date
US20220247323A1 (en) 2022-08-04
DE102019208582A1 (de) 2020-12-17
WO2020249753A1 (fr) 2020-12-17

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