EP3423932A4 - Techniques de commande basée sur terminaison sur puce - Google Patents

Techniques de commande basée sur terminaison sur puce Download PDF

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Publication number
EP3423932A4
EP3423932A4 EP17760425.3A EP17760425A EP3423932A4 EP 3423932 A4 EP3423932 A4 EP 3423932A4 EP 17760425 A EP17760425 A EP 17760425A EP 3423932 A4 EP3423932 A4 EP 3423932A4
Authority
EP
European Patent Office
Prior art keywords
techniques
command based
die termination
termination
die
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP17760425.3A
Other languages
German (de)
English (en)
Other versions
EP3423932A1 (fr
EP3423932B1 (fr
Inventor
Christopher E. Cox
Kuljit S. Bains
James A. Mccall
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of EP3423932A1 publication Critical patent/EP3423932A1/fr
Publication of EP3423932A4 publication Critical patent/EP3423932A4/fr
Application granted granted Critical
Publication of EP3423932B1 publication Critical patent/EP3423932B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629Configuration or reconfiguration of storage systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659Command handling arrangements, e.g. command buffers, queues, command scheduling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604Improving or facilitating administration, e.g. storage management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • G06F3/0611Improving I/O performance in relation to response time
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614Improving the reliability of storage systems
    • G06F3/0619Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656Data buffering arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0683Plurality of storage devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1084Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22Control and timing of internal memory operations
    • G11C2207/2254Calibration
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1066Output synchronization
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1093Input synchronization

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Memory System (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
EP17760425.3A 2016-03-04 2017-01-16 Techniques de commande basée sur terminaison sur puce Active EP3423932B1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201662303707P 2016-03-04 2016-03-04
US15/200,981 US20170255412A1 (en) 2016-03-04 2016-07-01 Techniques for Command Based On Die Termination
PCT/US2017/013658 WO2017151229A1 (fr) 2016-03-04 2017-01-16 Techniques de commande basée sur terminaison sur puce

Publications (3)

Publication Number Publication Date
EP3423932A1 EP3423932A1 (fr) 2019-01-09
EP3423932A4 true EP3423932A4 (fr) 2019-11-13
EP3423932B1 EP3423932B1 (fr) 2021-05-05

Family

ID=59723603

Family Applications (1)

Application Number Title Priority Date Filing Date
EP17760425.3A Active EP3423932B1 (fr) 2016-03-04 2017-01-16 Techniques de commande basée sur terminaison sur puce

Country Status (6)

Country Link
US (1) US20170255412A1 (fr)
EP (1) EP3423932B1 (fr)
KR (2) KR20230154286A (fr)
CN (2) CN115079955A (fr)
TW (1) TWI713033B (fr)
WO (1) WO2017151229A1 (fr)

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US10541018B2 (en) 2017-09-26 2020-01-21 Intel Corporation DDR memory bus with a reduced data strobe signal preamble timespan
US10692560B2 (en) 2018-06-06 2020-06-23 Intel Corporation Periodic calibrations during memory device self refresh
US10797700B2 (en) * 2018-12-21 2020-10-06 Samsung Electronics Co., Ltd. Apparatus for transmitting and receiving a signal, a method of operating the same, a memory device, and a method of operating the memory device
US11226762B2 (en) 2019-01-31 2022-01-18 Sony Group Corporation Memory command that specifies one of multiple possible write data values where the write data is not transported over a memory data bus
CN112817884A (zh) * 2019-11-15 2021-05-18 安徽寒武纪信息科技有限公司 一种存储器以及包括该存储器的设备
KR20210070557A (ko) 2019-12-05 2021-06-15 삼성전자주식회사 온-다이 터미네이션의 제어 방법 및 이를 수행하는 메모리 시스템
US11200190B2 (en) * 2020-04-21 2021-12-14 Innogrit Technologies Co., Ltd. Command based on-die termination for high-speed NAND interface
US11755246B2 (en) * 2021-06-24 2023-09-12 Advanced Micro Devices, Inc. Efficient rank switching in multi-rank memory controller

Citations (2)

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US20100208535A1 (en) * 2009-02-17 2010-08-19 Elpida Memory, Inc. Semiconductor memory device, memory module including the same, and data processing system
US20140244922A1 (en) * 2012-01-20 2014-08-28 Kuljit S. Bains Multi-purpose register programming via per dram addressability mode

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US7142461B2 (en) * 2002-11-20 2006-11-28 Micron Technology, Inc. Active termination control though on module register
CN100565490C (zh) * 2002-11-20 2009-12-02 微米技术有限公司 通过模块上寄存器的主动终止控制
US7894260B2 (en) * 2003-01-03 2011-02-22 Samsung Electronics Co., Ltd. Synchronous semiconductor memory device having on-die termination circuit and on-die termination method
US7286436B2 (en) * 2004-03-05 2007-10-23 Netlist, Inc. High-density memory module utilizing low-density memory components
KR100604843B1 (ko) * 2004-03-26 2006-07-31 삼성전자주식회사 온-다이 종단 회로를 구비한 메모리 모듈 및 그 제어 방법
KR100670699B1 (ko) * 2004-11-01 2007-01-17 주식회사 하이닉스반도체 온 다이 터미네이션 회로를 갖는 반도체메모리소자
KR100805696B1 (ko) * 2005-09-29 2008-02-21 주식회사 하이닉스반도체 반도체 메모리 장치
US7414426B2 (en) * 2005-12-07 2008-08-19 Intel Corporation Time multiplexed dynamic on-die termination
JP5019573B2 (ja) * 2006-10-18 2012-09-05 キヤノン株式会社 メモリ制御回路とメモリシステム、及びそのメモリ制御方法、及び集積回路
WO2008079911A1 (fr) * 2006-12-21 2008-07-03 Rambus Inc. Terminaison sur puce dynamique de signaux d'adresse et de commande
KR100857854B1 (ko) * 2007-01-10 2008-09-10 주식회사 하이닉스반도체 효과적으로 온다이 터미네이션 동작 타이밍 조절이 가능한반도체 메모리 장치
US20080197877A1 (en) * 2007-02-16 2008-08-21 Intel Corporation Per byte lane dynamic on-die termination
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WO2010144624A1 (fr) * 2009-06-09 2010-12-16 Google Inc. Programmation de valeurs de résistance de terminaison dimm
KR101789077B1 (ko) * 2010-02-23 2017-11-20 삼성전자주식회사 온-다이 터미네이션 회로, 데이터 출력 버퍼, 반도체 메모리 장치, 메모리 모듈, 온-다이 터미네이션 회로의 구동 방법, 데이터 출력 버퍼의 구동 방법 및 온-다이 터미네이션 트레이닝 방법
KR101095007B1 (ko) * 2010-09-30 2011-12-20 주식회사 하이닉스반도체 온 다이 터미네이션 신호 생성회로, 생성 방법 및 이를 이용하는 반도체 장치
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KR102219451B1 (ko) * 2014-09-22 2021-02-24 삼성전자주식회사 스토리지 컨트롤러, 이의 동작 방법 및 이를 포함하는 솔리드 스테이트 디스크

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See also references of WO2017151229A1 *

Also Published As

Publication number Publication date
CN108604168A (zh) 2018-09-28
KR20180113520A (ko) 2018-10-16
EP3423932A1 (fr) 2019-01-09
KR20230154286A (ko) 2023-11-07
EP3423932B1 (fr) 2021-05-05
CN115079955A (zh) 2022-09-20
US20170255412A1 (en) 2017-09-07
WO2017151229A1 (fr) 2017-09-08
TWI713033B (zh) 2020-12-11
CN108604168B (zh) 2022-08-02
TW201735041A (zh) 2017-10-01

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