Classifications

• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M3/00—Conversion of dc power input into dc power output
  • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
  • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
  • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
  • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
  • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
  • H02M3/157—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M3/00—Conversion of dc power input into dc power output
  • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
  • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
  • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
  • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
  • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M1/00—Details of apparatus for conversion
  • H02M1/0003—Details of control, feedback or regulation circuits
  • H02M1/0016—Control circuits providing compensation of output voltage deviations using feedforward of disturbance parameters
  • H02M1/0022—Control circuits providing compensation of output voltage deviations using feedforward of disturbance parameters the disturbance parameters being input voltage fluctuations

Definitions

• the present invention relates to a power converter with dynamic voltage scaling (DVS) .
• the present invention specifically relates to a standard DC DC power converter with dynamic voltage scaling.
• Switched DC DC power conversion has been widely adopted to supply a point of load with power such as a device.
• a supplied device such as microprocessor, FPGA or other digital circuit can run over a certain voltage range.
• energy is wasted if the supplied device is running at a higher voltage than required for its performance, energy is wasted .
• the supplied device is running a significant portion of time in a so called light load or medium load condition. Under these conditions the device does not need to run with the highest possible supply voltage. If, however the supplied device is running at a highest possible supply voltage under a light or medium load condidition, the energy consumption of the supplied device is higher than necessary. Instead the supply voltage can be lowered and therefore the energy consumption can also be lowered.
• the present invention relates to a power converter generating an adjusted supply voltage according to the performance required by the supplied device.
• the supplied device communicates its required supply voltage, i.e. the reference supply voltage, to the power converter. With the required supply voltage communicated to and an adjusted supply voltage generated by the power converter, the energy consumption of the device is optimized .
• Fig. 1 shows a block diagram of a power converter and a supplied device that communicates its required supply voltage to the power converter using a low pass filter; shows a relationship between an input output voltage of the supplied device (V_IO) , a duty ratio of a PWM signal used to communicate a required supply voltage and an analog-to-digital (ADC) converter input voltage Vin; shows a selection procedure for the duty ratio of the PWM signal and a maximum ADC input voltage; shows a mapping of and ADC input voltage to a reference supply voltage; shows a block diagram for programming a PWM generator; shows a block diagram of a power converter and a supplied device that communicates its required supply voltage to the power converter using a resisitive divider;
• Fig. 7 shows a block diagram of a power converter and a supplied device that communicates its required supply voltage to the power converter using a combined resisitive divider and low pass filter;
• Fig. 8 shows a relationship between ADC input voltage and refe ⁇ rence supply voltage
• Fig. 9 shows another block diagram for programming the PWM generator.
• Fig. 10 shows a flow diagram showing a task flow in the supplied device and and the power converter
• Fig. 1 shows a power converter 11 and a supplied device 12 that communicates its required supply voltage to the power converter 11.
• the power converter 11 comprises a switchable power stage 15 for generating an output voltage for powering a supply domain of a supplied device 12, wherein the switchable power stage 15 is driven by a driver 16 controlled by a controller 17 generating a switching signal for driving the switchable power stage 15 according to a reference supply voltage.
• the power converter can be a buck converter as shown in Fig. 1.
• the switchable power stage 15 comprises a high-side switch 18, a low-side switch 19, an inductor 110 and a capacitor 111.
• An analog to digital converter (ADC) 112 of the controller 17 of the power converter 11 is used as an communication interface.
• a pulse width modulation (PWM) signal generated by PWM generator 13 can be used to generate an analog value by means of a low pass filter 14.
• PWM pulse width modulation
• This low pass filtered signal V in is then read by the ADC 112 of the controller 17 and mapped to the reference supply voltage Vsup the controller 17.
• the ADC input voltage Vin can be translated into the reference supply voltage Vsu according to this equation:
• Vmin is a minimum reference supply voltage
• Vmax is a maximum supply voltage
• Vin max is a maximum ADC input voltage
• Vmax, Vmin and Vin, max and also a minimum ADC input voltage Vin,min may be stored in the DCDC controller memory.
• V_IO 10 voltage
• VADCmax maximum ADC voltage
• the PWM has to be limited to VADCmax/V_IO*100% in order to avoid exceeding the voltage limit of the ADC.
• V_IO, PWM and Vinmax are shown in Fig. 2. These are the maximum possible or allowed values for Vinmax and PWM. Any value below the straight line on the left side and below the hyperbola on the right side of the graph in Fig. 2 can be picked as the maximum values for PWM and Vinmax.
• the selection procedure for PWM and Vinmax is illustrated in Fig. 3.
• the PWM generator 53 can be easily programmed into any digital device as shown in Figure 5 according to the requirement of a user application 51. It can be done in software or hardware. It can also be based on a module 52 that is predefined and then is instantiated into the digtal device as a netlist or a module based on a HDL (hard ware description language) like Verilog or VHDL . Doing this the PWM generator 53 can be incorporated in any device like a FPGA, ASIC, uC or uP .
• the HDL code or netlist 52 can be developed independently of the application of the supplied device. Only the interface to the PWM generator 53 needs to be specified. Input for the PWM generator 53 is a serial or parallel interface defining the desired PWM duty cycle and a clock. The output of the PWM generator is one external pin which is driving the PWM signal.
• the highest flexibility can be achieved with a soft IP on HDL level. This way the number of bits required for the resolution of the PWM duty cycle can be specified during the design cycle of the user application. It is also possible to use a process specific layout based hard IP, in which case the flexibility for the PWM duty cycle resolution will be lost. It is not mandatory to use the IP based approach.
• the PWM functionality can also be programmed in SW or in a state machine or together with any other HW that the supplied device is incorporating.
• the low pass filter can be omitted because the PWM output will be logic low or logic high, i.e. it is a DC value.
• V_IO > VADCmax a resistive divider is needed instead of the low pass to limit the ADC input voltage to VADCmax.
• V_IO ⁇ VADCmax Vinmax needs to be set to V_IO .
• Fig. 6 the modified block diagram with analogous reference signs as in Fig. 1 is shown.
• the low pass filter has been replaced by the resistive divider 64. In this application Vsup can only have two values which in some applications are sufficient .
• an additional resistor R2 as shown in Fig. 6 and 7 can be provided.
• R2/(Rl+R2) has to be VADCmax/V_IO.
• the filter 74 comprises a low pass filter and a resistive divider.
• the controller 77 will hold in its memory (volatile or non volatile) the values for Vinmin, Vinmax, Vmin and Vmax and will adjust Vsup according to the equation as shown in Figure 8:
• Vmax-Vmin is the dynamic range of the reference supply voltage and Vin, max-Vin, min is the dynamic range of the ADC input
• a duty ratio of the PWM signal is limited such that at maximum a 100% duty ratio of the PWM signal corresponds to a maximum ADC input voltage that can be read by the ADC and wherein the ADC input voltage is mapped to the reference supply reference such that a dynamic range of the ADC input voltage corresponds to a dynamic range of the reference supply voltage.
• the PWM generator 73 will generate a PWM output with a linear resolution of n bits between PWMmin and PWMmax.
• the operating range of Vin can be influenced through Rl and R2 and with Clp together with Rl and R2 a low pass filter is formed to generate a DC value from the PWM signal.
• Fig. 9 shows another block diagram for programming the PWM generator 93.
• the PWM generator is a HDL module with the clock and the PWMdig signal as inputs and PWMmax and PWMmin as a parameter.
• This IP can also be provided as a layout or netlist IP 92 according to a user application 91. In this case the
• the PWM generator is part of the supplied device .
• Fig. 10 illustrates the flow in the supplied device and in the DCDC controller.
• the communication is a one way communication from the supplied device to the DCDC controller. This means that the maximum time from sending out the DVS signal (PWM change) to the time the output voltage reaches its desired value has to be calculated during the system design and a waiting period has to be implemented to wait for completion of the output voltage change. This is not important for the situation going from a high performance mode, i.e. high output voltage to a lower output voltage. But it is important when going from a low power mode to a high power mode, because the supplied device needs to wait the calculated maximum time to go into the high performance , i.e. high power, mode.

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• Engineering & Computer Science (AREA)
• Power Engineering (AREA)
• Dc-Dc Converters (AREA)

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• 2014
  • 2014-12-03 WO PCT/EP2014/076445 patent/WO2015144263A1/en active Application Filing
  • 2014-12-03 EP EP14808593.9A patent/EP3123266A1/en not_active Withdrawn
  • 2014-12-03 JP JP2016558321A patent/JP2017509305A/ja active Pending
  • 2014-12-04 TW TW103142164A patent/TWI586086B/zh not_active IP Right Cessation

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