EP2342959A1 - Procédé d'intégration d'un composant électronique dans une carte imprimée - Google Patents

Procédé d'intégration d'un composant électronique dans une carte imprimée

Info

Publication number
EP2342959A1
EP2342959A1 EP09756396A EP09756396A EP2342959A1 EP 2342959 A1 EP2342959 A1 EP 2342959A1 EP 09756396 A EP09756396 A EP 09756396A EP 09756396 A EP09756396 A EP 09756396A EP 2342959 A1 EP2342959 A1 EP 2342959A1
Authority
EP
European Patent Office
Prior art keywords
layer
holes
electronic component
adhesive
openings
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP09756396A
Other languages
German (de)
English (en)
Inventor
Wolfgang Schrittwieser
Christian Arzt
Klaus Merl
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&S Austria Technologie und Systemtechnik AG
Original Assignee
AT&S Austria Technologie und Systemtechnik AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AT&S Austria Technologie und Systemtechnik AG filed Critical AT&S Austria Technologie und Systemtechnik AG
Publication of EP2342959A1 publication Critical patent/EP2342959A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568Temporary substrate used as encapsulation process aid
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
    • HELECTRICITY
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    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19Manufacturing methods of high density interconnect preforms
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    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L24/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/188Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00Articles made by soldering, welding or cutting
    • B23K2101/36Electric or electronic devices
    • B23K2101/42Printed circuits
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2103/00Materials to be soldered, welded or cut
    • B23K2103/30Organic material
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2103/00Materials to be soldered, welded or cut
    • B23K2103/50Inorganic material, e.g. metals, not provided for in B23K2103/02 – B23K2103/26
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    • H01L2224/82001Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] involving a temporary auxiliary member not forming part of the bonding apparatus
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    • H01L2224/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H01L2224/82009Pre-treatment of the connector or the bonding area
    • H01L2224/8203Reshaping, e.g. forming vias
    • H01L2224/82035Reshaping, e.g. forming vias by heating means
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    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92142Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92144Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
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    • HELECTRICITY
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    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
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    • H05K2201/0335Layered conductors or foils
    • H05K2201/0355Metal foils
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10674Flip chip
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954Other details of electrical connections
    • H05K2201/10977Encapsulated connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0548Masks
    • H05K2203/0554Metal used as mask for etching vias, e.g. by laser ablation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1461Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
    • H05K2203/1469Circuit made after mounting or encapsulation of the components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • H05K3/0026Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0035Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
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    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
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    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H05K3/305Affixing by adhesive
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10Methods of surface bonding and/or assembly therefor
    • Y10T156/1052Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
    • Y10T156/1056Perforating lamina

Definitions

  • the present invention relates to a method for integrating an electronic component into a printed circuit board, comprising the following steps:
  • the present invention therefore aims to avoid the disadvantages of the method of the above-mentioned type according to the prior art, and aims in particular to further develop and improve a method of the type mentioned in that a reliable removal of the in bores or ., Openings corresponding to the contacts of an electronic component to be integrated adhesive, which Fixing the component to a supporting layer is used, can be achieved quickly and with simple and conveniently in connection with the production of a printed circuit board per se known and therefore usually available means or devices.
  • a method of the type mentioned is essentially characterized in that for the removal of the adhesive in the holes or openings, a laser beam is used whose dimension or diameter exceeds the inside diameter of the holes or openings. Since the adhesive located in the region of the holes or perforations is removed by a laser beam, a reliable and reliable removal of the entire adhesive in the holes or openings is made possible according to the contacts of the component to be integrated, with further advantages of such removal of the adhesive means Are laser in the controllability of such a laser and the achievable uniformity during the adhesive removal at the same time high process speed.
  • a use of a laser is to be regarded as a correspondingly easy-to-handle modification of a production method of a printed circuit board, whereby such modifications are widespread and, for example, even with only minor changes in the structure or design of a printed circuit board respectively required.
  • a laser beam is used according to the invention for removing the adhesive in the holes or apertures, the dimension or diameter of which is the clear width of the holes or holes Exceeds breakthroughs.
  • the fact that the dimension or the diameter of the laser beam exceeds the clear width of the holes or perforations can additionally with a lower precision with regard to the alignment of the laser beam - A - to every single hole to be cleaned the Ausmaschine be found.
  • the adhesive in the region of the holes or openings be removed by a CO 2 laser beam.
  • a CO 2 laser can not only be handled according to light and reliable and is also widely used in the production of printed circuit boards, but also ensures that the materials usually contained in adhesives, especially organic materials reliably from the holes or Breakthroughs are removed.
  • a laser in particular pulsed CO 2 laser with a power of 0.1 to 75 watts, in particular from 0.1 to 7 watts, for a period or a pulse length of 0.1 to 20 microseconds is used.
  • the electronic component For a proper embedding of the electronic component to be integrated in the printed circuit board as well as in particular for providing a substantially planar surface, which is particularly favorable or necessary in a further processing or processing of a usually multi-layer printed circuit board, according to a further preferred embodiment form proposed that the electronic component after being fixed to the layer of an insulating material, in particular a prepreg sheet and / or a resin is surrounded.
  • an insulating material in particular a prepreg sheet and / or a resin
  • the layer of the circuit board which serves to support the electronic component, optionally has an extremely small thickness and / or low strength
  • the layer for supporting the electronic component is applied prior to the formation of holes or openings on a carrier layer, which is removed before removing the adhesive from the holes or openings.
  • a carrier layer provides a sufficiently stable base during the deposition of the electronic component on the supporting layer.
  • it can be removed in a simple manner after the determination of the electronic component to be integrated and before the removal of the adhesive from the holes or openings.
  • Such a carrier layer may be formed to achieve the required strength, for example, of a metal and having a correspondingly large thickness, the carrier layer can be subsequently removed or detached in a simple manner and subsequently optionally used in connection with the production of additional circuit boards can.
  • the layer for supporting the electronic component is formed by a conductive layer.
  • the electrically conductive layer for contacting the contacts of the electronic component by a chemical deposition of an electrically conductive or conductive material, in particular copper, or a Sputtem a metallic layer is formed.
  • a chemical deposition or sputtering allows the formation of a thin uniform layer or layer for contacting, which can serve in particular as a basis for applying further, in particular conductive structures, in which context it is also proposed that the electrically conductive layer is applied substantially over the entire surface on the surface facing away from the component surface of the supporting layer, as corresponds to a further preferred embodiment of the method according to the invention.
  • a provision of a substantially planar surface for a further formation of, in particular, conductive or conductive structures after contacting the contacts or contact points of the electronic component to be integrated is proposed according to a further preferred embodiment, that after the application of the electrically conductive layer, the holes or Openings corresponding to the contacts of the component in essentially completely filled with conductive material, in particular by a galvanic deposition of conductive material.
  • a production of conductive or conductive structures, such as conductor tracks, can be carried out, for example, by the substantially full-surface conductive layer subsequent structuring, for example, a laser structuring, photostructuring or the like, is subjected, as a further preferred embodiment corresponds to the method according to the invention.
  • thermoly conductive or conductive adhesive be used for fixing the component, as claimed in a further preferred embodiment of the invention. complies with the appropriate procedure.
  • the inventive method can be used in particular for producing a multilayer printed circuit board.
  • FIG. 2a to 2g show a modified embodiment of a method according to the invention for producing a printed circuit board, wherein only the method steps until the removal of adhesive from the holes or openings of the component supporting layer are shown in more detail in Fig. 2, during further steps of a production and integration of the component in a particular multi-layer printed circuit board in Fig. 1 can be removed.
  • a layer 1 is provided for supporting an electronic component to be integrated, shown below, on a carrier layer denoted by 2.
  • Fig. 1b it is seen that in a subsequent step in the layer 1 holes or openings 3 corresponding contacts of the subsequently to be supported on the layer 1 or to be determined, electronic component, for example, by laser drilling or etching.
  • a laser can be used for drilling the layer 1, with which the holes or openings 3 for a subsequent contacting of contacts of the electronic component to be integrated into the printed circuit board can be produced quickly and reliably.
  • an attachment of an electronic component 4 to the layer 1 takes place, wherein an adhesive 5 is indicated for fixing.
  • an adhesive 5 is indicated for fixing.
  • the bores or perforations 3, which are also filled by the adhesive 5 have been formed in the layer 1 corresponding to the positions of contacts or contact points of the component 4 denoted by 6 and the contacts 6 are directed to the holes or openings 3.
  • the carrier layer 2 is removed, whereupon, in a further method step according to FIG. 1f, the adhesive 5 received or located in the holes or openings 3 of the layer 1 is removed.
  • This removal of the adhesive 5 located in the holes or openings 3 takes place by applying a laser beam, which is schematically indicated by 9 in FIG. 1f.
  • the laser beam used to remove the adhesive present in the apertures or holes 3 is formed, for example, by a CO 2 laser, wherein, in particular in coordination with materials and / or fillers usually contained in such adhesives 5, the following parameters are used in accordance with Example 1 for a safe and reliable removal of the adhesive from the holes or openings 3 are used or selected:
  • the diameter or the dimension of the laser beam 9 exceeds the dimension or clear width of the holes or openings 3, so that even if less stringent requirements on the precision for aligning the laser beam Relative to the holes 3, the adhesive 5 is reliably and reliably removed from the holes or perforations 3 by their complete covering.
  • the directed beam provided by the laser beam 9 reliably removes the adhesive 5 only from the holes or apertures 3, while it is not to be feared that, for example - S -
  • an education or application of an electrically conductive layer 10 for contacting the contacts or contact points takes place substantially over the whole area on the side facing away from the electronic component 4 to be integrated.
  • the electrically conductive layer 10 for example, by a chemical deposition of an electrically conductive or conductive material, such as copper, or sputtering a metallic layer with a correspondingly low layer thickness of example wise applied or formed less than 1 micron.
  • the conductive or conductive layer 10 formed in the method step according to FIG. 1h is usually formed from the same material as that for filling the cavities 11 and for forming the layer 12, in FIG 1h separated conductive or conductive layer 10 is no longer indicated separately and thus forms a part of the material for filling the holes or openings 3 corresponding to the contacts 6 and the additional conductive layer 12th
  • further structuring steps are one
  • FIG. 1k Structuring of the particular multilayer printed circuit board is indicated, wherein in the illustration according to FIG. 1k it can be seen that a structuring of a resist 13 takes place according to a subsequent structuring, in particular of the layer or layer 12 and / or the layer 1 coupled thereto.
  • FIG. 11 it is indicated that, in accordance with the resist 13 applied in FIG. 1k, partial regions of the layer 12 are once again removed, as shown by the stepped or recessed regions 14 and 15 in FIG.
  • Fig. 11 is indicated. In Fig. 11 is also indicated that at the same time a corresponding structuring of the further layer 8 can be made.
  • the layer 1 While essentially any material can be selected for the layer 1 in order to support the electronic component 4 to be integrated, it is proposed, in particular for a further structuring of conductive or conductive elements, that the layer 1 also be formed from a conductive or conductive material is, so that in the process step shown in Fig. 1 i substantially a combined layer of substantially identical material of the layers or layers 1 and 12 is provided, as in the subsequent method steps according to FIG. 1k and 11 as uniform layer is indicated.
  • FIG. 2 the reference symbols of FIG. 1 are retained for identical elements or components, it being apparent from a comparison of the method steps according to FIGS. 1a to 1g with the method steps according to FIGS. 2a to 2g that the essential differences between the method illustrated in FIGS. 1 and 2, in particular in the relative dimensions of the contacts 6 of the electronic component 4 to be integrated and in the thickness of the adhesive 5 used in the method according to FIG. 2.
  • a layer 1 is provided on a carrier layer 2, whereupon holes or openings 3 are formed in the layer 1 in the subsequent method step according to FIG.
  • adhesive 5 is applied for fixing the electronic component 4 to be integrated in relation to the embodiment of FIG. 1. Larger layer thickness, wherein the contacts 6 in the illustration of FIG. 2 larger dimensions than those of FIG. 1, wherein this is taken into account by a corresponding larger formation of the holes or openings 3.
  • a laser beam which is denoted by 16 is also used in the method step shown in FIG. 2f.
  • the laser steel 16 may in turn be formed by a CO 2 laser similar to the embodiment according to FIG. 1 f, the following parameters being in accordance with Example 2 for completely removing the adhesive from the holes or Openings 3 are used in a correspondingly short period of time:
  • thick adhesive layer (30-50 ⁇ m) and / or high filler content
  • Pulsed CO 2 laser Power 4 Watt Beam diameter: 280 ⁇ m Pulse duration: 8 ⁇ s Number of pulses: 13
  • the laser beam 16 also has larger dimensions than the perforations 3 in order to meet lower requirements with regard to the orientation or registration of the laser beam 16 to the holes 3, wherein a reliable Removal of the adhesive 5 from the holes 3 can be achieved, so that overall the process time can be optimized and reduced.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Laser Beam Processing (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

L'invention concerne un procédé d'intégration d'un composant électronique dans une carte imprimée, comprenant les étapes consistant à : - prendre une couche (1) d'une carte imprimée comme support pour déposer le composant électronique (4); - réaliser des trous (3) dans la couche (1) en fonction des contacts (6) du composant électronique (4); - appliquer une colle (5) sur la couche (1) pour poser le composant électronique (4); - fixer le composant électronique (4) sur la couche (1 ) en veillant à orienter les contacts (6) vers la couche (1) et vers les trous (3); - enlever la colle (5) se trouvant éventuellement dans la zone des trous ou des percées (3), notamment par application d'un faisceau laser (9), et - former une couche électro-conductrice (10) pour la mise en contact électrique des contacts (6) du composant électronique (4) au niveau de la surface, opposée au composant (4), de la couche (1). Pour enlever la colle (5) des trous ou des percées (3), on utilise un faisceau laser (9) dont les dimensions ou le diamètre dépasse(nt) le diamètre intérieur des trous ou des percées (3), ce qui permet d'enlever facilement, rapidement et de manière fiable la colle (5) se trouvant dans les trous (3) correspondants aux contacts (6) du composant à intégrer (4).
EP09756396A 2008-10-30 2009-10-28 Procédé d'intégration d'un composant électronique dans une carte imprimée Withdrawn EP2342959A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
AT0061908U AT12316U1 (de) 2008-10-30 2008-10-30 Verfahren zur integration eines elektronischen bauteils in eine leiterplatte
PCT/AT2009/000419 WO2010048654A1 (fr) 2008-10-30 2009-10-28 Procédé d'intégration d'un composant électronique dans une carte imprimée

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EP2342959A1 true EP2342959A1 (fr) 2011-07-13

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US (1) US20110198018A1 (fr)
EP (1) EP2342959A1 (fr)
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AT13055U1 (de) * 2011-01-26 2013-05-15 Austria Tech & System Tech Verfahren zur integration eines elektronischen bauteils in eine leiterplatte oder ein leiterplatten-zwischenprodukt sowie leiterplatte oder leiterplatten-zwischenprodukt
EP2757865A1 (fr) * 2011-09-12 2014-07-23 Meiko Electronics Co., Ltd. Procédé de fabrication de substrat ayant un composant incorporé et substrat ayant un composant intégré utilisant celui-ci
AT513047B1 (de) * 2012-07-02 2014-01-15 Austria Tech & System Tech Verfahren zum Einbetten zumindest eines Bauteils in eine Leiterplatte
US9084382B2 (en) 2012-10-18 2015-07-14 Infineon Technologies Austria Ag Method of embedding an electronic component into an aperture of a substrate
AT514074B1 (de) * 2013-04-02 2014-10-15 Austria Tech & System Tech Verfahren zum Herstellen eines Leiterplattenelements
AT514564B1 (de) * 2013-07-04 2015-02-15 Austria Tech & System Tech Verfahren zum Ankontaktieren und Umverdrahten
US10219384B2 (en) 2013-11-27 2019-02-26 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Circuit board structure
AT515101B1 (de) 2013-12-12 2015-06-15 Austria Tech & System Tech Verfahren zum Einbetten einer Komponente in eine Leiterplatte
AT515447B1 (de) 2014-02-27 2019-10-15 At & S Austria Tech & Systemtechnik Ag Verfahren zum Kontaktieren eines in eine Leiterplatte eingebetteten Bauelements sowie Leiterplatte
US11523520B2 (en) 2014-02-27 2022-12-06 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Method for making contact with a component embedded in a printed circuit board
US9999136B2 (en) * 2014-12-15 2018-06-12 Ge Embedded Electronics Oy Method for fabrication of an electronic module and electronic module
CN105328344B (zh) * 2015-11-14 2017-07-04 苏州光韵达光电科技有限公司 一种用于球栅陈列结构pcb的激光除胶装置及方法

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US20110198018A1 (en) 2011-08-18
AT12316U1 (de) 2012-03-15

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